HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 459

MCU 3V 384K I-TEMP 100-TQFP

HD64F2239TF20I

Manufacturer Part Number
HD64F2239TF20I
Description
MCU 3V 384K I-TEMP 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet

Specifications of HD64F2239TF20I

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2239TF20I
Manufacturer:
Renesas Electronics America
Quantity:
10 000
11.3.9
In the H8S/2227 Group, TSYR selects independent or synchronous TCNT operation for channels
0 to 2. In other groups, TSYR selects independent or synchronous TCNT operation for channels 0
to 5. A channel performs synchronous operation when the corresponding bit in TSYR is set to 1.
Note:
Bit
7, 6
5
4
3
2
1
0
* In the H8S/2227 Group, bits 5 to 3 are reserved. The write value should always be 0.
Bit Name
SYNC5 *
SYNC4 *
SYNC3 *
SYNC2
SYNC1
SYNC0
Timer Synchronous Register (TSYR)
Initial value
All 0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reserved
The write value should always be 0.
Timer Synchronization 5 to 0
These bits select whether operation is independent of
or synchronized with other channels.
When synchronous operation is selected,
synchronous presetting of multiple channels, and
synchronous clearing through counter clearing on
another channel are possible.
To set synchronous operation, the SYNC bits for at
least two channels must be set to 1. To set
synchronous clearing, in addition to the SYNC bit, the
TCNT clearing source must also be set by means of
bits CCLR2 to CCLR0 in TCR.
0: TCNT_5 to TCNT_0 operates independently
1: TCNT_5 to TCNT_0 performs synchronous
(TCNT presetting /clearing is unrelated to
other channels)
operation (TCNT synchronous presetting/
synchronous clearing is possible)
Rev. 6.00 Mar. 18, 2010 Page 397 of 982
Section 11 16-Bit Timer Pulse Unit (TPU)
REJ09B0054-0600

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