HD64F2239TF20I Renesas Electronics America, HD64F2239TF20I Datasheet - Page 362

• Manufacturer Part Number: HD64F2239TF20I
• Description: MCU 3V 384K I-TEMP 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2239TF20I

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 9 Data Transfer Controller (DTC)
9.5.7
Table 9.6 lists execution status for a single DTC data transfer, and table 9.7 shows the number of
states required for each execution status.
Table 9.6
Mode
Normal
Repeat
Block transfer
Legend:
N: Block size (initial setting of CRAH and CRAL)
Table 9.7
Object to be Accessed
Bus width
Access states
Legend:
m: The number of wait states for accessing external devices.
The number of execution states is calculated from using the formula below. Note that Σ is the sum
of all transfers activated by one activation event (the number in which the CHNE bit is set to 1,
plus 1).
Number of execution states = I · S
Rev. 6.00 Mar. 18, 2010 Page 300 of 982
REJ09B0054-0600
Execution
Status
Number of DTC Execution States
Byte data read S
Word data read S
Byte data write S
Word data write S
Internal operation S
Vector read S
Register information
read/write S
DTC Execution Status
Number of States Required for Each Execution Status
Vector Read
I
1
1
1
J
I
K
L
K
L
M
Register Information
Read/Write
J
6
6
6
I
+ Σ (J · S
On-
Chip
RAM
32
1
⎯
1
1
1
1
1
1
On-
Chip
ROM
16
1
1
1
1
1
1
⎯
J
+ K · S
Internal I/O
Registers
8
2
2
4
2
4
⎯
⎯
K
Data Read
K
1
1
N
+ L · S
16
2
2
2
2
2
⎯
⎯
L
) + M · S
External Devices
8
2
2
4
2
4
4
⎯
Data Write
L
1
1
N
M
8
3
6 + 2 m 2
⎯
3 + m
6 + 2 m 2
3 + m
6 + 2 m 2
2
2
16
⎯
2
Internal
Operations
M
3
3
3
16
3
3 + m
⎯
3 + m
3 + m
3 + m
3 + m