CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 141

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

UART and IR Port
5.12.1.4 CEIR Mode
The Consumer Electronics IR circuitry is designed to opti-
mally support all major protocols presently used in the fol-
lowing remote-controlled home entertainment equipment:
RC-5, RC-6, RECS 80, NEC, and RCA. This module, in
conjunction with an external optical device, provides the
physical layer functions necessary to support these proto-
cols. Such functions include: modulation, demodulation,
serialization, de-serialization, data buffering, status report-
ing, interrupt generation, etc. The software is responsible
for the generation of IR code transmitted, and the interpre-
tation of received code.
CEIR Transmit Operation
The transmitted code consists of a sequence of bytes that
represents either a bit string or a set of run-length codes.
The number of bits or run-length codes needed to repre-
sent each IR code bit depends on the IR protocol used.
The RC-5 protocol, for example, needs two bits or between
one and two run-length codes to represent each IR code
bit.
Transmission is initiated when the processor or DMA con-
troller writes code bytes into the empty TX_FIFO. Trans-
mission is completed when the processor sets the S_EOT
bit of the ASCR, before writing the last byte, or when the
DMA controller activates the terminal count (TC). Trans-
mission also terminates if the processor simply stops trans-
ferring data and the transmitter becomes empty. In this
case, however, a transmitter-underrun condition is gener-
ated that must be cleared in order to begin the next trans-
mission.
The transmission bytes are either de-serialized or run-
length encoded, and the resulting bit-string modulates a
carrier signal that is sent to the transmitter LED. The trans-
fer rate of this bit-string, like in UART mode, is determined
by the value programmed in the Baud Generator Divisor
Register. Unlike a UART transmission, START, STOP, and
PARITY bits are not included in the transmitted data
stream. A logic 1 in the bit-string keeps the LED off, so no
IR signal is transmitted. A logic 0 generates a sequence of
modulating pulses that turn on the transmitter LED. Fre-
quency and pulse width of the modulating pulses are pro-
grammed by the MCFR and MCPW fields in the IRTXMC
register, as well as the TXHSC bit of the RCCFG register.
The RC_MMD field of RCCFG selects the transmitter mod-
ulation mode. If the C_PLS mode is selected, modulating
pulses are generated continuously for the entire logic 0 bit
time. If 6_PLS or 8_PLS mode is selected, six or eight
pulses are generated each time a logic 0 bit is transmitted
following a logic 1 bit.
AMD Geode™ CS5535 Companion Device Data Book
C_PLS modulation mode is used for RC-5, RC-6, NEC,
and RCA protocols. 8_PLS or 6_PLS modulation mode is
used for the RECS 80 protocol. The 8_PLS or 6_PLS
mode allows minimization of the number of bits needed to
represent the RECS 80 IR code sequence. The current
transmitter implementation supports only the modulated
modes of the RECS 80 protocol; it does not support the
Flash mode.
Note: The total transmission time for the logic 0 bits must
CEIR Receive Operation
The CEIR receiver is significantly different from a UART
receiver. The incoming IR signals are DASK modulated;
therefore, demodulation may be necessary. Also, there are
no START bits in the incoming data stream.
The operations performed by the receiver, whenever an IR
signal is detected, are slightly different, depending on
whether or not receiver demodulation is enabled. If demod-
ulation is disabled, the receiver immediately becomes
active. If demodulation is enabled, the receiver checks the
carrier frequency of the incoming signal and becomes
active only if the frequency is within the programmed
range. Otherwise, the signal is ignored and no other action
is taken.
When the receiver enters the Active state, the RXACT bit
of the ASCR is set to 1. Once in the Active state, the
receiver keeps sampling the IR input signal and generates
a bit-string, where a logic 1 indicates an Idle condition and
a logic 0 indicates the presence of IR energy. The IR input
is sampled regardless of the presence of IR pulses at a
rate determined by the value loaded into the Baud Genera-
tor Divisor Registers. The received bit-string is either de-
serialized and assembled into 8-bit characters, or is con-
verted to run-length encoded values. The resulting data
bytes are then transferred into the receiver FIFO
(RX_FIFO).
The receiver also sets the RXWDG bit of the ASCR each
time an IR pulse signal is detected. This bit is automatically
cleared when the ASCR is read. It is intended to assist the
software in determining when the IR link has been Idle for a
period of time. The software can then stop data from being
received by writing a 1 into the RXACT bit to clear it, and
return the receiver to the inactive state.
The frequency bandwidth for the incoming modulated IR
signal is selected by the DFR and DBW fields in the
IRRXDC register. There are two CEIR receive data modes:
Oversampled and Programmed T Period. For either mode,
the sampling rate is determined by the setting of the Baud
Generator Divisor Registers.
be equal to or greater than six or eight times the
period of the modulation subcarrier, otherwise
fewer pulses will be transmitted.
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