CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 509
CS5535-UDCF
Manufacturer Part Number
CS5535-UDCF
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.CS5535-UDCF.pdf
(579 pages)
Specifications of CS5535-UDCF
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Part Number:
CS5535-UDCF
Manufacturer:
AMD
Quantity:
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Power Management Controller Register Descriptions
6.18.3.8 PM Sleep Control Y De-assert Delay (PM_SCYD)
PMS I/O Offset
Type
Reset Value
Reads always return the value written.
AMD Geode™ CS5535 Companion Device Data Book
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
29:0
Bit
31
30
Name
RSVD
SLPY_END_EN
SLPY_END_
DELAY
1Ch
R/W
00000000h
Description
Reserved. By convention write 0, but may write anything.
Sleep Y De-assert and Delay Enable. Must be high to de-assert SLEEP_Y and
enable the delay specified in bits [29:0] (SLPY_END_DELAY).
Sleep Control Y De-assert Delay. Indicates the number of 3.57954 MHz clock edges
to wait from Sleep wakeup before de-asserting the SLEEP_Y ball. Bit 30
(SLPY_END_EN) must be high to enable this delay.
If PCI_IDE_IN_SLP is not enabled (PMS I/O Offset 20h[30] = 0) or is less than the
SLPY_END_DELAY, SLEEP_Y de-asserts at the same time the PCI/IDE inputs are re-
enabled.
PM_SCYD Bit Descriptions
PM_SCYD Register Map
SLPY_END_DELAY
9
8
31506B
7
6
5
4
3
2
1
509
0
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