CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 47

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Signal Definitions
3.2.8
Table 3-8 gives the dedicated functions associated with each GPIO. These functions may be invoked by configuring the
associated GPIO to the IN_AUX1, OUT_AUX1, or OUT_AUX2 modes. (The functions themselves are described in Table 3-
9 "GPIOx Available Functions Descriptions" on page 49.) The column “Recommended Use” is a guideline for system
designers to assign GPIO functionality. Any GPIO input can be mapped to an interrupt, ASMI, or PME. Details of configur-
ing the GPIOs are given in Section 6.16 "GPIO Subsystem Register Descriptions" on page 450. All GPIOs have selectable
pull-up and/or pull-down resistors available on the output, except for those indicated by Note 3 in the “Weak PU/PD” col-
umn of Table 3-8.
Note 1.
Note 2.
Note 3.
AMD Geode™ CS5535 Companion Device Data Book
GPIO
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
See Section 6.16.2.5 on page 458 for ball configuration.
See Section 6.16.2.6 on page 459 for ball configuration.
No internal pull-up/down available. If not used, tie low.
GPIOs
Ball
B12
No.
R2
D3
D2
C2
D1
C3
G3
H2
G1
G2
H3
C9
C8
K3
E1
E2
E3
A1
F2
F1
K1
A9
B7
A8
J3
J2
J1
Domain
Power
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
S
S
S
S
S
Buffer
Type
SMB
SMB
SMB
SMB
SMB
PCI
IDE
PCI
PCI
PCI
PCI
PCI
PCI
PCI
PCI
Q7
Q7
Q7
Q7
Q7
Q7
Q7
Q7
Q7
Q7
Q7
Q7
Q7
(Note 3)
(Note 6)
(Note 3)
(Note 3)
(Note 3)
(Note 6)
(Note 3)
(Note 3)
(Note 3)
(Note 3)
(Note 3)
(Note 3)
(Note 3)
(Note 3)
(Note 3)
(Note 3)
(Note 3)
PU/PD
PU/PD
PU/PD
PU/PD
PU/PD
Weak
sense
sense
Auto-
Auto-
PU
PU
PU
PU
PU
PD
PU
Post Reset
LPC (Note 9)
LPC (Note 9)
LPC (Note 9)
LPC (Note 9)
LPC (Note 9)
LPC (Note 9)
LPC (Note 9)
Table 3-8. GPIO Options
I/O Config
(Note 11)
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Enabled
Input
Recommended
PME# (Note 10)
LPC_FRAME#
LPC_SERIRQ
PWR_BUT#
LPC_DRQ#
--- (Note 7)
--- (Note 8)
PCI_INTA#
PCI_INTB#
--- (Note 7)
--- (Note 8)
DDC_SCL
DDC_SDA
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
(Note 12)
(Note 4)
(Note 5)
(Note 5)
(Note 4)
Use
---
---
---
---
---
---
---
---
---
---
---
THRM_ALRM#
UART1_IR_RX
SMB_DATA_IN
UART1_RX or
SMB_CLK_IN
MFGPT1_RS
MFGPT0_RS
MFGPT2_RS
MFGPT7_RS
SLEEP_BUT
PWR_BUT#
LOW_BAT#
UART2 RX
AC_S_IN2
IDE_IRQ0
(Note 13)
IN_AUX1
Function Programming Options
31506B
SMB_DATA_OUT
SMB_CLK_OUT
SLP_CLK_EN#
MFGPT0_C1
MFGPT1_C1
MFGPT2_C1
MFGPT7_C1
WORK_AUX
OUT_AUX1
UART1_TX
UART2 TX
AC_BEEP
Note 1
UART1_IR_TX
MFGPT1_C2
MFGPT7_C2
MFGPT0_C2
MFGPT2_C2
OUT_AUX2
SLEEP_X
SLEEP_Y
32KHZ
Note 2
47