CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 205

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

GeodeLink™ Interface Unit Register Descriptions
6.1.1.3
MSR Address
Type
Reset Value
The flags are set by internal conditions. The internal conditions are enabled if the EN bit is 0. Reading the FLAG bit returns
the value; writing 1 clears the flag; writing 0 has no effect. (See Section 4.8.3 "MSR Address 2: SMI Control" on page 74 for
further SMI and ASMI generation details.)
AMD Geode™ CS5535 Companion Device Data Book
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:36
31:4
Bit
35
34
33
32
GLD SMI MSR (GLIU_GLD_MSR_SMI)
Name
RSVD
STATCNT2_
ASMI_FLAG
STATCNT1_
ASMI_FLAG
STATCNT0_
ASMI_FLAG
SSMI_FLAG
RSVD
51010002h
R/W
00000000_00000001h
Description
Reserved. Write as read.
Statistic Counter 2 ASMI Flag. If high, records that an ASMI was generated due to a
Statistic Counter 2 (MSR 510100A8h) event. Write 1 to clear; writing 0 has no effect.
STATCNT2_ASMI_EN (bit 3) must be low to generate ASMI and set flag.
Statistic Counter 1 ASMI Flag. If high, records that an ASMI was generated due to a
Statistic Counter 1 (MSR 510100A4h) event. Write 1 to clear; writing 0 has no effect.
STATCNT1_ASMI_EN (bit 2) must be low to generate ASMI and set flag.
Statistic Counter 0 SMI Flag. If high, records that an ASMI was generated due to a Sta-
tistic Counter 0 (MSR 510100A0h) event. Write 1 to clear; writing 0 has no effect.
STATCNT0_ASMI_EN (bit 1) must be low to generate ASMI and set flag.
SSMI Flag. If high, records that an SSMI was generated due to a received event. Event
sources are:
• Illegal request type to GLIU (Port 0), meaning anything other than MSR read/write,
• A self-referencing packet (i.e., a packet sent to the GLIU that finds its destination port
• The destination of the packet is to a port where the GLIU slave for that port has been
• Trap on a descriptor with device port set to 0. This is the typical operational use of this
Write 1 to clear; writing 0 has no effect. SSMI_EN (bit 0) must be low to generate SSMI
and set flag.
Reserved. Write as read.
debug request, and null.
is the source port).
disabled.
bit. The data returned with such a trap is the value 0.
GLIU_GLD_MSR_SMI Bit Descriptions
GLIU_GLD_MSR_SMI Register Map
RSVD
RSVD
9
8
31506B
7
6
5
4
3
2
1
205
0