CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 371
CS5535-UDCF
Manufacturer Part Number
CS5535-UDCF
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.CS5535-UDCF.pdf
(579 pages)
Specifications of CS5535-UDCF
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS5535-UDCF
Manufacturer:
AMD
Quantity:
20 000
- Current page: 371 of 579
- Download datasheet (6Mb)
System Management Bus Register Descriptions
6.11.1
6.11.1.1 SMB Serial Data (SMB_SDA)
SMB I/O Offset
Type
Reset Value
6.11.1.2 SMB Status (SMB_STS)
SMB I/O Offset
Type
Reset Value
This is a read/write register with a special clear. Some of its bits may be cleared by software, as described in the table
below. This register maintains the current SMB status. On reset, and when the SMB is disabled, SMBST is cleared (00h).
AMD Geode™ CS5535 Companion Device Data Book
Bit
7:0
SLVSTP
Bit
7
6
7
7
SMB Native Registers
Name
SMBSDA
Name
SLVSTP (R/W1C)
SDAST (RO)
SDAST
00h
R/W
00h
01h
R/W
00h
6
6
Description
SMB Serial Data. This shift register is used to transmit and receive data. The most sig-
nificant bit is transmitted (received) first, and the least significant bit is transmitted last.
Reading or writing to the SMBSDA register is allowed only when the SDAST bit (SMB
I/O Offset 01h[6]) is set, or for repeated starts after setting the START bit (SMB I/O Off-
set 03h[0]). Any attempt to access the register in other cases may produce unpredict-
able results.
Description
Slave Stop (Read/Write 1 to Clear). Writing 0 to SLVSTP is ignored.
0: Writing 1 or SMB disabled.
1: Stop condition detected after a slave transfer in which MATCH (SMB I/O Offset
SMB_DATA Status (Read Only).
0: Reading from SMBSDA (SMB I/O Offset 00h) during a receive, or when writing to it
1: SMBSDA awaiting data (transmit - master or slave) or holds data that should be
BER
02h[2]) or GCMATCH (SMB I/O Offset 02h[3]) was set.
during a transmit. When START (SMB I/O Offset 03h[0]) is set, reading SMBSDA
does not clear SDAST; enabling the SMB to send a repeated start in master receive
mode.
read (receive - master or slave).
5
5
SMB_SDA Bit Descriptions
SMB_STS Bit Descriptions
SMB_SDA Register Map
SMB_STS Register Map
NEGACK
4
4
SMBSDA
STASTR
3
3
NMATCH
2
2
31506B
MASTER
1
1
XMIT
0
0
371
Related parts for CS5535-UDCF
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Manufacturer:
AMD (ADVANCED MICRO DEVICES)
Datasheet:
Part Number:
Description:
AMD-751ACAMD-751-TM System Controller Revision Guide
Manufacturer:
Advanced Micro Devices
Datasheet:
Part Number:
Description:
AMD-751AMD-751-TM System Controller Revision Guide
Manufacturer:
Advanced Micro Devices
Datasheet:
Part Number:
Description:
AMD-X5-133SFZAm5X86? Microprocessor Family
Manufacturer:
Advanced Micro Devices
Datasheet:
Part Number:
Description:
Hyper Transport PCI-X Tunnel
Manufacturer:
Advanced Micro Devices
Datasheet:
Part Number:
Description:
HyperTransport I/O Hub
Manufacturer:
Advanced Micro Devices
Datasheet:
Part Number:
Description:
System Controller
Manufacturer:
Advanced Micro Devices
Datasheet:
Part Number:
Description:
AMD-K6 Processor
Manufacturer:
AMD [Advanced Micro Devices]
Datasheet:
Part Number:
Description:
AMD-K6™-2E Embedded Processor
Manufacturer:
AMD [Advanced Micro Devices]
Datasheet:
Part Number:
Description:
Manufacturer:
AMD (ADVANCED MICRO DEVICES)
Datasheet: