CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 427

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Direct Memory Access Register Descriptions
6.13.2.10 Slave DMA Channel [3:0] Write Mask Register (DMA_CH3:0_WR_MSK)
I/O Address
Type
Reset Value
6.13.2.11 Master DMA Channel [7:4] Memory Address (DMA_CH[x]_ADDR_BYTE)
Master DMA Channel 4 Memory Address
(DMA_CH4_ADDR_BYTE)
I/O Address
Type
Reset Value
Master DMA Channel 5 Memory Address
(DMA_CH5_ADDR_BYTE)
I/O Address
Type
Reset Value
AMD Geode™ CS5535 Companion Device Data Book
Bit
7:4
Bit
7:0
3
2
1
0
7
7
Name
Reserved
CH3_MASK
CH2_MASK
CH1_MASK
CH0_MASK
Name
DMA_CH_ADDR_BYTE
00Fh
WO
0Fh
0C0h
R/W
xxh
0C4h
R/W
xxh
6
6
RSVD
Description
Reserved. Write value is don’t care.
Channel 3 Mask Value. 0: Not masked; 1: Masked.
Channel 2 Mask Value. 0: Not masked; 1: Masked.
Channel 1 Mask Value. 0: Not masked; 1: Masked.
Channel 0 Mask Value. 0: Not masked; 1: Masked.
DMA_CH[x]_ADDR_BYTE Bit Descriptions
5
DMA_CH3:0_WR_MSK Bit Descriptions
DMA_CH[x]_ADDR_BYTE Register Map
5
DMA_CH3:0_WR_MSK Register Map
Description
DMA Channel Address. Read/write in two successive bus cycles, low byte first.
DMA_CH_ADDR_BYTE
4
4
CH3_MASK
Master DMA Channel 6 Memory Address
(DMA_CH6_ADDR_BYTE)
I/O Address
Type
Reset Value
Master DMA Channel 7 Memory Address
(DMA_CH7_ADDR_BYTE)
I/O Address
Type
Reset Value
3
3
CH2_MASK
2
2
0C8h
R/W
xxh
0CCh
R/W
xxh
31506B
CH1_MASK
1
1
CH0_MASK
0
0
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