CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 460

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

6.16.2.8 GPIO/AUX Pull-Down Enable (GPIO[x]_PD_EN)
These registers control enabling of the pull-down on the low (GPIO[15:0]) and high (GPIO[31:16]) banks of GPIOs. If the
feature bit is high, the pull-down is enabled. If the feature bit is low, the pull-down is disabled.The reset value forces all the
pull-downs to be disabled. (These registers use atomic programming, see Section 6.16.1 on page 454 for details.)
GPIO Low Bank Pull-Down Enable (GPIOL_PD_EN)
GPIO I/O Offset
Type
Reset Value
6.16.2.9 GPIO/IN_AUX Input Enable (GPIO[x]_IN_EN)
These registers control the input enable for the low (GPIO[15:0]) and high (GPIO[31:16]) banks of GPIOs. If the feature bit
is high, the input is enabled. If the feature bit is low, the input is disabled.The reset value forces all the inputs to be disabled.
(These registers use atomic programming, see Section 6.16.1 on page 454 for details.)
GPIO Low Bank Input Enable (GPIOL_IN_EN)
GPIO I/O Offset
Type
Reset Value
460
For bits [6:5], see special disabling rules for the auto-sense GPIOs in Section 5.15.5.6 on page 165.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
1Ch
R/W
EFFF1000h
20h
R/W
FFFF0000h
31506B
GPIOH_PD_EN Register Map
GPIOL_PD_EN Register Map
GPIOH_IN_EN Register Map
GPIOL_IN_EN Register Map
GPIO High Bank Pull-Down Enable (GPIOH_PD_EN)
GPIO I/O Offset
Type
Reset Value
GPIO High Bank Input Enable (GPIOH_IN_EN)
GPIO I/O Offset
Type
Reset Value
AMD Geode™ CS5535 Companion Device Data Book
9Ch
R/W
FFFF0000h
A0h
R/W
EFFF1000h
GPIO Subsystem Register Descriptions
9
9
9
9
8
8
8
8
7
7
7
7
6
6
6
6
5
5
5
5
4
4
4
4
3
3
3
3
2
2
2
2
1
1
1
1
0
0
0
0