CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 287

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

USB Controller Register Descriptions
6.5.3.3
Index
Type
Reset Value
AMD Geode™ CS5535 Companion Device Data Book
15:10
15
Bit
9
8
7
6
5
4
3
2
1
0
Command (USBC_PCI_CMD)
14
Name
RSVD
FB2B_EN (RO)
SERR
WS_CTL
PAR
VGA_SNP_EN
(RO)
MEMW_INV
SPC_CYC
MSTR_EN
MEM
IO
13
04h
R/W
0000h
RSVD
12
11
Description
Reserved. Set to 0.
Fast Back-to-Back Enable (Read Only). USB only acts as a master to a single
device, so this functionality is not needed. It is always disabled (must always be set to
0).
System Error. USB asserts SERR# when it detects an address parity error.
0: Disable; 1: Enable.
Wait Cycle Control. USB does not need to insert a wait state between the address
and data on the AD lines. It is always disabled (bit is set to 0).
Parity Error. USB asserts PERR# when it is the agent receiving data and it detects a
data parity error. 0: Disable; 1: Enable.
VGA Palette Snoop Enable (Read Only). USB does not support this function. It is
always disabled (bit is set to 0).
Memory Write and Invalidate: Allow USB to run Memory Write and Invalidate com-
mands. 0: Disable; 1: Enable.
The Memory Write and Invalidate commands only occur if the cache line size is set to
32 bytes and the memory write is exactly one cache line.
This bit is ignored by the GeodeLink Adapter and hence the setting is a ‘don’t care’.
Special Cycles. USB does not run special cycles on PCI. It is always disabled (bit is
set to 0).
PCI Master Enable. Allow USB to run PCI master cycles. 0: Disable; 1: Enable.
Memory Space. Allow USB to respond as a target to memory cycles. 0: Disable; 1:
Enable.
I/O Space. Allow USB to respond as a target to I/O cycles. 0: Disable; 1: Enable.
10
USBC_PCI_CMD Bit Descriptions
USBC_PCI_CMD Register Map
9
SERR
8
7
PAR
6
5
4
31506B
3
2
MEM
1
IO
0
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