CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 542

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

6.20.2.11 GLCP System Reset Control (GLCP_SYS_RST)
MSR Address
Type
Reset Value
Writing 1 to the CHIP_RESET bit creates a chip-wide reset and in turn, resets this register. Writing this register with the
CHIP_RESET bit set will never send a write-response over the GLIU Interface (this allows halting bus traffic before the
reset occurs).
6.20.2.12 GLCP Debug Clock Control (GLCP_DBGCLKCTL)
MSR Address
Type
Reset Value
This register is reserved for internal testing only. These bits should not be written to.
542
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:24
23:1
63:0
Bit
Bit
0
Name
RSVD
RSVD
CHIP_RESET
Name
RSVD
RSVD
51700014h
R/W
00000000_00000000h
51700016h
R/W
00000000_00000002h
31506B
Description
Reserved. Reads as 0.
Reserved. These bits can be read/written but should not be used; write to 0.
Chip Reset. When written to a 1, the Geode CS5535 companion device enters reset,
which in turn resets this register. JTAG logic is not reset by CHIP_RESET, but other-
wise the entire chip is reset. (Default = 0.)
Description
Reserved. This register is reserved for internal testing only. These bits should not be
written to.
GLCP_DBGCLKCTL Bit Descriptions
GLCP_DBGCLKCTL Register Map
GLCP_SYS_RST Bit Descriptions
GLCP_SYS_RST Register Map
RSVD
RSVD
RSVD
GeodeLink™ Control Processor Register Descriptions
RSVD
AMD Geode™ CS5535 Companion Device Data Book
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
0
0