CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 297
CS5535-UDCF
Manufacturer Part Number
CS5535-UDCF
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.CS5535-UDCF.pdf
(579 pages)
Specifications of CS5535-UDCF
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS5535-UDCF
Manufacturer:
AMD
Quantity:
20 000
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USB Controller Register Descriptions
6.5.4.4
USB Memory Offset
Type
Reset Value
All bits are set by the hardware and cleared by software.
AMD Geode™ CS5535 Companion Device Data Book
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
29:7
Bit
31
30
6
5
4
3
2
1
0
HCD:
HC:
Host Controller Interrupt Status (USBC_HcInterruptStatus)
Name
RSVD
Ownership
Change
RSVD
RootHubStatus
Change
FrameNumber
Overflow
Unrecoverable
Error
Resume
Detected
StartOfFrame
WritebackDone
Head
Scheduling
Overrun
0Ch
R/W
R/W
00000000h
HCD
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
USBC_HcInterruptStatus Bit Descriptions
USBC_HcInterruptStatus Register Map
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
HC
RSVD
Description
Reserved. Read/write 0s.
Ownership Change. This bit is set when the OwnershipChang-
eRequest bit of HcCommandStatus is set.
Reserved. Read/write 0s.
Root Hub Status Change. This bit is set when the content of
HcRhStatus or the content of any HcRhPortStatus register has
changed.
Frame Number Overflow. Set when bit 15 of FrameNumber
changes value.
Unrecoverable Error (Read Only). This event is not imple-
mented and is hard-coded to 0. HCD clears this bit.
Resume Detected. Set when HC detects resume signaling on a
downstream port.
Start Of Frame. Set when the Frame Management block signals
a Start of Frame event.
Writeback Done Head. Set after the HC has written HcDone-
Head.
Scheduling Overrun. Set when the List Processor determines a
Schedule Overrun has occurred.
9
8
31506B
7
6
5
4
3
2
1
297
0
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