CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 271

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

ATA-5 Controller Register Descriptions
6.4.2.4
MSR Address
Type
Reset Value
AMD Geode™ CS5535 Companion Device Data Book
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
If MSR 50302021h[31] = 1, Format 1. Allows independent control of command and data.
Format 1 settings for:
Note: Register settings described as “Value + n cycle(s)” will produce timings for the indicated parameter as measured
31:28
27:24
23:20
19:16
15:12
11:8
Bit
7:4
3:0
in 66 MHz clock cycles. The ‘value’ that is entered is the desired number of 66 MHz clock cycles in hexadecimal;
the actual parameter timing generated by that entry is the entered ‘value’ plus the indicated number of ‘cycles’
(‘n’) as listed in the description of that parameter.
Channel 0 Drive 0 DMA (ATAC_CH0D0_DMA)
MODE66_SEL
MODE66_SEL
Name
t2IC
t3C
t2WC
t1C
t2ID
t3D
t2WD
t1D
51300021h
R/W
00000000_00077771h
PIO Mode 0 = F7F4F7F4h
PIO Mode 1 = 53F3F173h
PIO Mode 2 = 13F18141h
PIO Mode 3 = 51315131h
PIO Mode 4 = 11311131h
ATAC_CH0D0_PIO Bit Descriptions (Continued)
RSVD
RSVD
Description
Command Cycle Recovery Time. Value + 1 cycle.
Command Cycle IDE_IOW# Data Setup. Value + 1 cycle.
Command Cycle IDE_IOW# Pulse Width Minus t3. Value + 1 cycle.
Command Cycle Address Setup Time. Value + 1 cycle.
Data Cycle Recovery Time. Value + 1 cycle.
Data Cycle IDE_IOW# Data Setup. Value + 1 cycle.
Data Cycle IDE_IOW# Pulse Width Minus t3. Value + 1 cycle.
Data Cycle Address Setup Time. Value + 1 cycle.
ATAC_CH0D0_DMA Register Map
tCRC
tKR
RSVD
tDR
tSS
tCYC
tKW
9
8
31506B
7
6
tDW
tRP
5
4
3
2
tACK
tM
1
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