CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 477

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

GPIO Subsystem Register Descriptions
6.16.3.6 GPIO Event Counter Decrement (GPIO[x]_EVNTCNT_DEC)
There are two 32-bit Event Counter Decrement registers one for the lower bank (GPIO[15:0]) and one for the higher bank
(GPIO[31:16]) of GPIOs.These registers generate one 33 ns wide pulse when written to it, so multiple successive writes
may be performed without waiting for the previous write to ‘complete; in addition, reading these registers always provides
0s.
GPIO Low Bank Event Counter Decrement
(GPIOL_EVNTCNT_DEC)
GPIO I/O Offset
Type
Reset Value
AMD Geode™ CS5535 Companion Device Data Book
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31:16
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
RSVD
ECD15
ECD14
ECD13
ECD12
ECD11
ECD10
ECD9
ECD8
ECD7
ECD6
ECD5
ECD4
ECD3
ECD2
ECD1
ECD0
F8h
R/W
00000000h
RSVD
Description
Reserved. Write/read as 0.
GPIO15 Event Counter Decrement. Writing this bit high generates a decrement pulse to
the event counter that has been associated with this GPIO. There is no need to write the bit
low again. This bit will always read as low. Event counters are associated with specific
GPIOs via the GPIO_FE[x]_SEL register set.
GPIO14 Event Counter Decrement. Same as EDC15 (bit 15)
GPIO13 Event Counter Decrement. Same as EDC15 (bit 15)
GPIO12 Event Counter Decrement. Same as EDC15 (bit 15).
GPIO11 Event Counter Decrement. Same as EDC15 (bit 15).
GPIO10 Event Counter Decrement. Same as EDC15 (bit 15).
GPIO9 Event Counter Decrement. Same as EDC15 (bit 15).
GPIO8 Event Counter Decrement. Same as EDC15 (bit 15).
GPIO7 Event Counter Decrement. Same as EDC15 (bit 15).
GPIO6 Event Counter Decrement. Same as EDC15 (bit 15).
GPIO5 Event Counter Decrement. Same as EDC15 (bit 15).
GPIO4 Event Counter Decrement. Same as EDC15 (bit 15).
GPIO3 Event Counter Decrement. Same as EDC15 (bit 15).
GPIO2 Event Counter Decrement. Same as EDC15 (bit 15).
GPIO1 Event Counter Decrement. Same as EDC15 (bit 15).
GPIO0 Event Counter Decrement. Same as EDC15 (bit 15).
GPIOL_EVNTCNT_DEC Bit Descriptions
GPIOL_EVNTCNT_DEC Register Map
9
8
31506B
7
6
5
4
3
2
1
477
0