CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 388

• Manufacturer Part Number: CS5535-UDCF
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of CS5535-UDCF

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

EIR, Non-Extended Mode (EXCR1.EXT_SL = 0)
In non-extended UART mode, the functional block prioritizes interrupts into four levels. The EIR indicates the highest level
of interrupt that is pending. See Table 6-33 for the encoding of these interrupts.
388
Bits[3:0]
0001
0110
0100
1100
0010
0000
Bit
7:6
5:4
2:1
EIR
3
0
FEN1
7
Name
FEN[1:0]
RSVD
RXFT
IPR[1:0]
IPF
N/A
Highest
Second
Second
Third
Fourth
Priority
Level
FEN0
6
31506B
Interrupt Type
None
Link Status
Receiver High
Data Level Event
RX_FIFO Timeout
Transmitter Low
Data Level Event
Modem Status
Table 6-33. EIR Non-Extended Mode Interrupt Priorities
Description
FIFOs Enabled.
00: No FIFO enabled (Default).
11: FIFOs enabled (bit 0 of FCR = 1).
01, 10: Reserved.
Reserved. Write to 0.
RX_FIFO Timeout. In the 16450 mode, this bit is always 0. In the 16550 mode (FIFOs
enabled), this bit is set to 1 when an RX_FIFO read timeout has occurred and the associ-
ated interrupt is currently the highest priority pending interrupt.
Interrupt Priority. When bit 0 (IPF) is 0, these bits indicate the pending interrupt with the
highest priority. (Default = 00). See Table 6-33.
Interrupt Pending Flag.
0: Interrupt pending.
1: No interrupt pending (Default).
EIR Non-Extended Mode Bit Descriptions
5
EIR Non-Extended Mode Register Map
RSVD
Interrupt Source
None
Parity error, framing error, data over-
run or break event.
Receiver Holding Register (RXD) is
full, or RX_FIFO level is equal to or
above the threshold.
At least one character is in the
RX_FIFO, and no character has
been input to or read from the
RX_FIFO for four character times.
Transmitter Holding Register or
TX_FIFO empty.
Any transition on CTS, DSR or DCD
or a high-to-low transition on RI.
4
RXFT
3
AMD Geode™ CS5535 Companion Device Data Book
IPR1
2
UART and IR Port Register Descriptions
Interrupt Reset Control
N/A
Read Link Status Register (LSR).
Reading the RXD or RX_FIFO
level drops below threshold.
Reading the RXD port.
Reading the Event Identification
Register (EIR) if this interrupt is
currently the highest priority
pending interrupt, or writing into
the TXD port.
Reading the Modem Status Reg-
ister (MSR).
IPR0
1
IPF
0