CS5535-UDCF AMD (ADVANCED MICRO DEVICES), CS5535-UDCF Datasheet - Page 370

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CS5535-UDCF

Manufacturer Part Number
CS5535-UDCF
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of CS5535-UDCF

Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
CS5535-UDCF
Manufacturer:
AMD
Quantity:
20 000
6.11
The registers for the System Management Bus (SMB) are
divided into two sets:
• Standard GeodeLink Device (GLD) MSRs (Shared with
• SMB Native Registers
The MSRs are accessed via the RDMSR and WRMSR pro-
cessor instructions. The MSR address is derived from the
370
DIVIL, see Section 6.6.1 on page 317.)
SMB I/O
Offset
00h
01h
02h
03h
04h
05h
06h
07h
System Management Bus Register Descriptions
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
31506B
Width
(Bits)
8
8
8
8
8
8
8
8
Table 6-27. SMB Native Registers Summary
Register Name
SMB Serial Data (SMB_SDA)
SMB Status (SMB_STS)
SMB Control Status (SMB_CTRL_STS)
SMB Control 1 (SMB_CTRL1)
SMB Address (SMB_ADDR)
SMB Control 2 (SMB_CTRL2)
SMB Control 3 (SMB_CTRL3)
SMB Reserved Register (SMBRSVD).
Writes are “don't care” and reads return
undefined value.
perspective of the CPU Core. See Section 4.2 "MSR
Addressing" on page 59 for more details.
The Native registers (summarized in Table 6-27) are
accessed via Base Address Register MSR_LBAR_SMB
(MSR 5140000Bh) as I/O Offsets. (See Section 6.6.2.4 on
page 327 for bit descriptions of the Base Address Regis-
ter.) The reference column in the summary table points to
the page where the register maps and bit descriptions are
listed.
AMD Geode™ CS5535 Companion Device Data Book
System Management Bus Register Descriptions
Reset Value
00h
00h
10h
00h
00h
00h
00h
xxh
Reference
Page 371
Page 371
Page 373
Page 374
Page 375
Page 376
Page 376
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