MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 114

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Table 130. SCI Control Register 2 (SCIC2)
Note:
Functional Description and Application Information
4.15.2.3
This register can be read or written at any time.
Table 131. SCIC2 Field Descriptions
Freescale Semiconductor
Offset
99.
Reset
W
R
Field
RWU
TCIE
SBK
RIE
TIE
LIE
RE
TE
(99)
Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.
7
6
5
4
3
2
1
0
0x43
Transmit Interrupt Enable (for TDRE)
0 Hardware interrupts from TDRE disabled (use polling).
1 Hardware interrupt requested when TDRE flag is 1.
Transmission Complete Interrupt Enable (for TC)
0 Hardware interrupts from TC disabled (use polling).
1 Hardware interrupt requested when TC flag is 1.
Receiver Interrupt Enable (for RDRF)
0 Hardware interrupts from RDRF disabled (use polling).
1 Hardware interrupt requested when RDRF flag is 1.
Idle Line Interrupt Enable (for IDLE)
0 Hardware interrupts from IDLE disabled (use polling).
1 Hardware interrupt requested when IDLE flag is 1.
Transmitter Enable
0 Transmitter off.
1 Transmitter on.
TE must be 1 in order to use the SCI transmitter. When TE = 1, the SCI forces the TxD pin to act as an output for the SCI system.
When the SCI is configured for single-wire operation (LOOPS = RSRC = 1), TXDIR controls the direction of traffic on the single
SCI communication line (TxD pin).
TE also can be used to queue an idle character by writing TE = 0 then TE = 1 while a transmission is in progress. Refer to
Section 4.15.3.2.1, “Send Break and Queued
When TE is written to 0, the transmitter keeps control of the port TxD pin until any data, queued idle, or queued break character
finishes transmitting before allowing the pin to revert to a general-purpose I/O pin.
Receiver Enable — When the SCI receiver is off, the RxD pin reverts to being a general-purpose port I/O pin. If LOOPS = 1
the RxD pin reverts to being a general-purpose I/O pin even if RE = 1.
0 Receiver off.
1 Receiver on.
Receiver Wake-up Control — This bit can be written to 1 to place the SCI receiver in a standby state where it waits for
automatic hardware detection of a selected wake-up condition. The wake-up condition is either an idle line between messages
(WAKE = 0, idle-line wake-up), or a logic 1 in the most significant data bit in a character (WAKE = 1, address-mark wake-up).
Application software sets RWU and (normally) a selected hardware condition automatically clears RWU. Refer to
Section 4.15.3.3.2, “Receiver Wake-up
0 Normal SCI receiver operation.
1 SCI receiver in standby waiting for wake-up condition.
Send Break — Writing a 1 and then a 0 to SBK queues a break character in the transmit data stream. Additional break
characters of 10 or 11 (13 or 14 if BRK13 = 1) bit times of logic 0 are queued as long as SBK = 1. Depending on the timing of
the set and clear of SBK relative to the information currently being transmitted, a second break character may be queued before
software clears SBK. Refer to
0 Normal transmitter operation.
1 Queue break character(s) to be sent.
TIE
SCI Control Register 2 (SCIC2)
7
0
TCIE
6
0
Section 4.15.3.2.1, “Send Break and Queued
RIE
0
5
Operation"” for more details.
Idle"” for more details.
ILIE
0
4
Description
TE
0
3
Serial Communication Interface (S08SCIV4)
Idle"” for more details.
RE
0
2
RWU
1
0
Access: User read/write
MM912F634
SBK
0
0
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