MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 137

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Table 179. Main Timer Interrupt Flag 2 (TFLG2)
Table 181. Timer Input Capture/Output Compare Register 0 (TC0)
Note:
Note:
Functional Description and Application Information
4.18.3.3.13
Offset
127.
4.18.3.3.14
Offset
128.
Freescale Semiconductor
Table 180. TFLG2 - Register Field Descriptions
Reset
Reset
Reset
W
W
W
R
R
R
(127)
(128)
Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.
Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.
Field
TOF
7
0xCD
0xCE, 0xCF
tc0_15
tc0_7
TOF
15
7
0
0
7
0
Timer Overflow Flag
1 = Indicates that an Interrupt has occurred (Set when 16-bit free-running timer counter overflows from $FFFF to $0000)
0 = Flag indicates an Interrupt has not occurred.
Main Timer Interrupt Flag 2 (TFLG2)
The TFLG2 register indicates when an interrupt has occurred. Writing a one to the TOF bit
will clear it. Any access to TCNT will clear TOF bit of TFLG2 register if the TFFCA bit in
TSCR register is set.
Timer Input Capture/Output Compare Registers (TC3 - TC0)
TRead anytime. Write anytime for output compare function. Writes to these registers have
no effect during input capture.
Depending on the TIOS bit for the corresponding channel, these registers are used to latch
the value of the free-running counter when a defined transition is sensed by the
corresponding input capture edge detector or to trigger an output action for output compare.
Read/Write access in byte mode for high byte should takes place before low byte otherwise
it will give a different result.
tc0_14
tc0_6
14
6
0
0
0
6
0
tc0_13
tc0_5
13
0
0
0
0
5
5
tc0_12
tc0_4
NOTE
NOTE
12
0
0
0
0
4
4
Description
tc0_11
tc0_3
11
0
0
0
0
3
3
Access: User read(anytime)/write (special mode)
Basic Timer Module - TIM (TIM16B4C)
tc0_10
tc0_2
10
0
0
0
0
2
2
tc0_9
tc0_1
1
0
0
9
0
1
0
Access: User read/write
MM912F634
tc0_8
tc0_0
0
0
0
8
0
0
0
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