MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 260

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Functional Description and Application Information
Table 338. RTICTL Field Descriptions (continued)
4.34.6.2.2
This register is used to restart the RTI time-out period.
Table 339. RTICNT Register Diagram
Read: Anytime
Write: Anytime in appliance of the write protection rules (see
When the RTI is turned on the RTIF bit can be set with the following rates:
Freescale Semiconductor
0x003D
RTIRT[1:0]
Reset
RTIRSTP
RTISWAI
W
R
Field
RTIE
1–0
4
3
2
RTICNT7
RTI Stops in Wait Mode Bit
Normal modes: Write once
Special modes: Write anytime.
0 RTI keeps running in Wait mode.
1 RTI stops and initializes the RTI counter whenever the part enters Wait mode.
RTI Runs in Stop Mode Bit
Normal modes: Write once
Special modes: Write anytime.
0 RTI stops in Stop mode
1 RTI continues in Stop mode
Note: If the RTIRSTP bit is cleared the RTI counter will go static while in Stop mode. The RTI counter will not initialize like in
Real Time Interrupt Enable Bit
Write anytime.
0 Interrupt requests from RTI are disabled.
1 Interrupt will be requested whenever RTIF is set.
RTI Interrupt Prescaler Rate Select Bits — These bits select the prescaler rate for the RTI. See
Divide Rates“
Write anytime in appliance of the write protection rules (see
0
7
RTI Counter select bits (RTICNT)
Wait mode with RTISWAI bit set.
Table 340. RTI Frequency Divide Rates
for selectable ratios in conjunction with RTICNT[7:0] counter select bits
RTICNT6
1111 1110 (255)
0000 0000 (1)
0000 0001 (2)
0000 0010 (3)
0000 0011 (4)
RTICNT[7:0]
0
6
......
RTICNT5
5
0
OFF
(OFF)
OFF
OFF
OFF
OFF
00
....
(185)
RTICNT4
0
4
4.34.7.1, “RTI register write protection
255x1
OFF
Description
2x1
3x1
4x1
(1)
01
....
RTIRT[1:0] =
4.34.7.1, “RTI register write protection
RTICNT3
0
3
255x16
2x16
3x16
4x16
(16)
10
16
....
RTICNT2
255x256
0
2
2x256
3x256
4x256
(256)
256
Real Time Interrupt (S12SRTIV1)
11
....
rules“)
RTICNT1
Table 340., “RTI Frequency
rules“).
1
0
MM912F634
RTICNT0
0
0
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