MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 293

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Functional Description and Application Information
4.36.4.2.5
The mass erase operation will erase the entire Flash array memory using an embedded algorithm.
An example flow to execute the mass erase operation is shown in
sequence is as follows:
If the Flash array memory to be mass erased contains any protected area, the PVIOL flag in the FSTAT register will set and the
mass erase command will not launch. Once the mass erase command has successfully launched, the CCIF flag in the FSTAT
register will set after the mass erase operation has completed.
Freescale Semiconductor
1.
2.
3.
Write to an aligned Flash block address to start the command write sequence for the mass erase command. The
address and data written will be ignored.
Write the mass erase command, 0x41, to the FCMD register.
Clear the CBEIF flag in the FSTAT register by writing a 1 to CBEIF to launch the mass erase command.
Mass Erase Command
Clock Register
Written
Check
Bit Polling for
Command Completion
Check
Command
Buffer Empty Check
Access Error and
Protection Violation
Check
Read: FCLKDIV register
2.
3.
1.
Figure 90. Example Mass Erase Command Flow
yes
FDIVLD
START
Write: FCMD register
Mass Erase Command 0x41
Write: FSTAT register
Clear CBEIF 0x80
Write: Flash Memory Address
and Dummy Data
Set?
Read: FSTAT register
Read: FSTAT register
ACCERR/PVIOL
yes
CBEIF
yes
no
CCIF
Set?
Set?
EXIT
Write: FCLKDIV register
Set?
no
no
yes
no
Figure
Write: FSTAT register
Clear ACCERR/PVIOL 0x30
NOTE: FCLKDIV needs to
be set after each reset
90. The mass erase command write
32 kbyte Flash Module (S12SFTSR32KV1)
MM912F634
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