MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 313

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Functional Description and Application Information
4.38.1.4
Figure 99
baud rate generator, master/slave control logic, and port control logic.
4.38.2
This section lists the name and description of all ports including inputs and outputs that do, or may, connect off chip. The
S12SPIV4 module has a total of four external pins.
4.38.2.1
This pin is used to transmit data out of the SPI module when it is configured as a master and receive data when it is configured
as slave.
4.38.2.2
This pin is used to transmit data out of the SPI module when it is configured as a slave and receive data when it is configured as
master.
Freescale Semiconductor
Bus Clock
gives an overview on the SPI architecture. The main parts of the SPI are status, control and data registers, shifter logic,
Interrupt
Request
SPI
External Signal Description
Block Diagram
MOSI — Master Out/Slave In Pin
MISO — Master In/Slave Out Pin
SPPR
SPI
Prescaler
SPI Baud Rate Register
SPI Control Register 1
SPI Control Register 2
Baud Rate Generator
SPI Status Register
SPI Data Register
Interrupt Control
SPIF
3
SPR
MODF
Clock Select
Counter
SPTEF
3
Figure 99. SPI Block Diagram
Baud Rate
LSBFE=1
LSBFE=0
8
8
Control
Control
Master
Slave
Master Baud Rate
Slave Baud Rate
MSB
2
2
Shifter
LSBFE=1
LSBFE=0
LSBFE=0
LSBFE=1
CPOL
Clock
Shift
Phase +
Polarity
Control
Phase +
Polarity
Control
LSB
CPHA
BIDIROE
SPC0
Sample
Clock
Data Out
Serial Peripheral Interface (S12SPIV4)
SCK In
SCK Out
Data In
Control
Logic
Port
MOSI
SCK
SS
MM912F634
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