MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 274

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Functional Description and Application Information
Table 352. FCLKDIV Field Descriptions (continued)
4.36.3.3.2
The FSEC register holds all bits associated with the security of the MCU and Flash module.
Table 353. Flash Security Register (FSEC)
All bits in the FSEC register are readable but are not writable.
The FSEC register is loaded from the Flash configuration field (see
F in
Table 354. FSEC Field Descriptions
Freescale Semiconductor
0x0101
KEYEN[1:0]
Reset
FDIV[5:0]
SEC[1:0]
PRDIV8
W
R
Table
Field
Field
5:0
7:6
1:0
6
353.
Enable Prescaler by 8.
0 The bus clock is directly fed into the clock divider.
1 The bus clock is divided by 8 before feeding into the clock divider.
Clock Divider Bits — The combination of PRDIV8 and FDIV[5:0] must divide the bus clock down to a frequency of 150 to
200 kHz. The minimum divide ratio is 2 (PRDIV8 = 0, FDIV = 0x01) and the maximum divide ratio is 512 (PRDIV8 = 1,
FDIV = 0x3F). Refer to
Backdoor Key Security Enable Bits — The KEYEN[1:0] bits define the enabling of backdoor key access to the Flash module
as shown in
Flash Security Bits — The SEC[1:0] bits define the security state of the MCU as shown in
unsecured using backdoor key access, the SEC[1:0] bits are forced to the unsecured state.
F
7
Flash Security Register (FSEC)
KEYEN[1:0]
Table
F
355.
6
Table 355. Flash KEYEN States
Table 356. Flash Security States
Note:
Note:
189.
190.
KEYEN[1:0]
Section 4.36.4.1.1, “Writing the FCLKDIV Register"”
SEC[1:0]
01
01
Preferred KEYEN state to disable Backdoor Key Access.
Preferred SEC state to set MCU to secured state.
00
10
00
10
11
(189)
(190)
5
0
0
Status of Backdoor Key Access
0
0
4
Status of Security
Description
Description
UNSECURED
Section
DISABLED
DISABLED
DISABLED
SECURED
SECURED
ENABLED
0
0
3
4.36.3.1.1) during the reset sequence, indicated by
32 kbyte Flash Module (S12SFTSR32KV1)
for more information.
0
0
2
Table
356. If the Flash module is
F
1
SEC[1:0]
MM912F634
F
0
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