MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 168

no-image

MM912H634DM1AER2

Manufacturer Part Number
MM912H634DM1AER2
Description
16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MM912H634DM1AER2

Rohs
yes
Core
HCS12
Processor Series
MM912F634
Data Bus Width
16 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
32 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
5.5 V to 18 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
15
Interface Type
SPI
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
15
Number Of Timers
1
Program Memory Type
Flash
Supply Voltage - Max
18 V
Supply Voltage - Min
5.5 V
Table 217. Port A Data Register (PTA)
Note:
Table 218. Port A Data Register Description
Functional Description and Application Information
4.27.3.1
154.
Freescale Semiconductor
Function
Address 0x0000
Reset
SPI
W
Field
R
PTA
PTA
PTA
PTA
PTA
PTA
5
4
3
2
1
0
Read: Anytime.
Write: Anytime.
Port A general purpose input/output data—Data Register
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the buffered and
synchronized pin input state is read.
Port A general purpose input/output data—Data Register
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the buffered and
synchronized pin input state is read.
Port A general purpose input/output data—Data Register
Port A pin 3 is associated with the SS signal of the SPI module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the buffered and
synchronized pin input state is read.
Port A general purpose input/output data—Data Register
Port A pin 2 is associated with the SCK signal of the SPI module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the buffered and
synchronized pin input state is read.
Port A general purpose input/output data—Data Register
Port A pin 1 is associated with the MOSI signal of the SPI module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the buffered and
synchronized pin input state is read.
Port A general purpose input/output data—Data Register
Port A pin 0 is associated with the MISO signal of the SPI module.
When not used with the alternative function, this pin can be used as general purpose I/O.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the buffered and
synchronized pin input state is read.
Port A Data Register (PTA)
7
0
0
6
0
0
PTA5
0
5
PTA4
0
4
Description
PTA3
SS
0
3
Port Integration Module (9S12I32PIMV1)
PTA2
SCK
0
2
Access: User read/write
MOSI
PTA1
0
1
MM912F634
MISO
PTA0
0
0
168
(154)

Related parts for MM912H634DM1AER2