MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 278

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Functional Description and Application Information
4.36.3.4
The FSTAT register defines the operational status of the Flash module.
Table 364. Flash Status Register (FSTAT - Normal Mode)
Table 365. Flash Status Register (FSTAT - Special Mode)
In normal mode, CCIF, PVIOL, and ACCERR are readable and writable. CCIF and BLANK are readable and not writable. The
remaining bits read 0 and are not writable.
In special mode, BLANK and FAIL are readable and writable. FAIL must be clear when starting a command write sequence.
Table 366. FSTAT Field Descriptions
Freescale Semiconductor
0x0105
0x0105
Reset
Reset
ACCERR
W
W
CBEIF
PVIOL
R
R
Field
CCIF
7
6
5
4
CBEIF
CBEIF
Command Buffer Empty Interrupt Flag — The CBEIF flag indicates that the command buffer is empty so that a new
command write sequence can be started when performing burst programming. Writing a 0 to the CBEIF flag has no effect on
CBEIF. Writing a 0 to CBEIF after writing an aligned address to the Flash array memory, but before CBEIF is cleared, will abort
a command write sequence and cause the ACCERR flag to be set. Writing a 0 to CBEIF outside of a command write sequence
will not set the ACCERR flag. The CBEIF flag is cleared by writing a 1 to CBEIF. The CBEIF flag is used together with the CBEIE
bit in the FCNFG register to generate an interrupt request (see
0 Command buffers are full.
1 Command buffers are ready to accept a new command.
Command Complete Interrupt Flag — The CCIF flag indicates that there are no more commands pending. The CCIF flag is
cleared when CBEIF is cleared and sets automatically upon completion of all active and pending commands. The CCIF flag
does not set when an active program command completes, and a pending burst program command is fetched from the
command buffer. Writing to the CCIF flag has no effect on CCIF. The CCIF flag is used together with the CCIE bit in the FCNFG
register to generate an interrupt request (see
0 Command in progress.
1 All commands are completed.
Protection Violation Flag —The PVIOL flag indicates an attempt was made to program or erase an address in a protected
area of the Flash memory or Flash IFR during a command write sequence. Writing a 0 to the PVIOL flag has no effect on PVIOL.
The PVIOL flag is cleared by writing a 1 to PVIOL. While PVIOL is set, it is not possible to launch a command or start a
command write sequence.
0 No protection violation detected.
1 Protection violation has occurred.
Access Error Flag — The ACCERR flag indicates an illegal access has occurred to the Flash memory or Flash IFR, caused
by either a violation of the command write sequence (see
Flash command (see
a 0 to the ACCERR flag has no effect on ACCERR. The ACCERR flag is cleared by writing a 1 to ACCERR.While ACCERR is
set, it is not possible to launch a command or start a command write sequence.
0 No access error detected.
1 Access error has occurred.
Flash Status Register (FSTAT)
1
1
7
7
CCIF
CCIF
1
1
6
6
Table
369), or the execution of a CPU STOP instruction while a command is executing (CCIF = 0). Writing
PVIOL
PVIOL
5
0
5
0
Figure
ACCERR
ACCERR
0
0
4
4
92).
Description
Section 4.36.4.1.2, “Command Write
Figure
0
0
0
0
3
3
92).
32 kbyte Flash Module (S12SFTSR32KV1)
BLANK
BLANK
0
0
2
2
Sequence"”), issuing an illegal
FAIL
1
0
0
1
0
MM912F634
0
0
0
0
0
0
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