MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 276

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Functional Description and Application Information
4.36.3.3.5
The FPROT register defines which Flash sectors are protected against program or erase operations.
Table 360. Flash Protection Register (FPROT)
In Normal mode, FPROT bits are readable and writable as long as the size of the protected Flash memory is being increased.
Any write to FPROT that attempts to decrease the size of the protected Flash memory will be ignored.
In special mode, FPROT bits are readable and writable without restrictions.
During the reset sequence, the FPROT register is loaded from the Flash protection byte in the Flash configuration field (see
Section
Flash configuration field must be unprotected, then the Flash protection byte must be reprogrammed.
Trying to alter data in any protected area in the Flash memory will result in a protection violation error, and the PVIOL flag will be
set in the FSTAT register. The mass erase of the Flash array is not possible if any of the Flash sectors contained in the Flash
array are protected.
Table 361. FPROT Field Descriptions
Freescale Semiconductor
0x0104
Reset
FPHS[4:0]
FPLS[2:0]
W
R
Field
7:3
2:0
4.36.3.1.1). To change the Flash protection that will be loaded during the reset sequence, the Flash sector containing the
Flash Protection Higher Address Size — The FPHS bits determine the size of the protected higher Flash address range as
shown in
Flash Protection Lower Address Size — The FPLS bits determine the size of the protected lower Flash address range as
shown in
F
7
Flash Protection Register (FPROT)
Table
Table
362.
363.
Table 362. Flash Protection Higher Address Range
F
6
FPHS[4:0]
0x0C
0x0D
0x0A
0x0B
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
FPHS[4:0]
F
5
Relative to Flash Array Base
Protected Address Range
0x0C00–0x7FFF
0x1C00–0x7FFF
0x2C00–0x7FFF
0x0400–0x7FFF
0x0800–0x7FFF
0x1000–0x7FFF
0x1400–0x7FFF
0x1800–0x7FFF
0x2000–0x7FFF
0x2400–0x7FFF
0x2800–0x7FFF
0x3000–0x7FFF
0x3400–0x7FFF
0x3800–0x7FFF
F
4
Description
F
3
Protected Size
32 kbyte Flash Module (S12SFTSR32KV1)
31 kbytes
30 kbytes
29 kbytes
28 kbytes
27 kbytes
26 kbytes
25 kbytes
24 kbytes
23 kbytes
22 kbytes
21 kbytes
20 kbytes
19 kbytes
18 kbytes
F
2
FPLS[2:0]
F
1
MM912F634
F
0
276