MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 229

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Functional Description and Application Information
4.31.3.2.8.4
Table 299. Debug Comparator Address Low Register (DBGXAL)
Read: Anytime. See
Write: If DBG not armed. See
Table 300. DBGXAL Field Descriptions
4.31.3.2.8.5
Table 301. Debug Comparator Data High Register (DBGADH)
Read: If COMRV[1:0] = 00
Write: If COMRV[1:0] = 00 and DBG not armed.
Table 302. DBGADH Field Descriptions
Freescale Semiconductor
Address: 0x002B
Address: 0x002C
Reset
Reset
Bits[15:8]
Bits[7:0]
W
W
R
R
Field
Field
7–0
7–0
Comparator Address Low Compare Bits — The Comparator address low compare bits control whether the selected
comparator will compare the address bus bits [7:0] to a logic one or logic zero.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one
Bit 15
Comparator Data High Compare Bits— The Comparator data high compare bits control whether the selected comparator
compares the data bus bits [15:8] to a logic one or logic zero. The comparator data compare bits are only used in comparison
if the corresponding data mask bit is logic 1. This register is available only for comparator A. Data bus comparisons are only
performed if the TAG bit in DBGACTL is clear.
0 Compare corresponding data bit to a logic zero
1 Compare corresponding data bit to a logic one
Bit 7
0
0
7
7
Debug Comparator Address Low Register (DBGXAL)
Debug Comparator Data High Register (DBGADH)
Table 300
Bit 14
Bit 6
Table 300
for visible register encoding.
0
0
6
6
for visible register encoding.
Bit 13
Bit 5
5
0
5
0
Bit 12
Bit 4
0
0
4
4
Description
Description
Bit 11
Bit 3
0
0
3
3
Bit 10
Bit 2
S12S Debug (S12SDBGV1) Module
0
0
2
2
Bit 1
Bit 9
1
0
1
0
MM912F634
Bit 0
Bit 8
0
0
0
0
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