MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 288

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Functional Description and Application Information
If an address to be programmed is in a protected area of the Flash block, the PVIOL flag in the FSTAT register will set and the
program command will not launch. Once the program command has successfully launched, the CCIF flag in the FSTAT register
will set after the program operation has completed.
4.36.4.2.3
The burst program operation will program previously erased data in the Flash memory using an embedded algorithm.
While burst programming, two internal data registers operate as a buffer and a register (2-stage FIFO), so that a second burst
programming command along with the necessary data can be stored to the buffers, while the first burst programming command
is still in progress. This pipelined operation allows a time optimization when programming more than one consecutive address
on a specific row in the Flash array as the high voltage generation can be kept active in between two programming commands.
An example flow to execute the burst program operation is shown in
sequence is as follows:
Freescale Semiconductor
1.
Write to an aligned Flash block address to start the command write sequence for the burst program command. The data
written will be programmed to the address written.
Burst Program Command
Clock Register
Written
Check
Bit Polling for
Command Completion
Check
Access Error and
Protection Violation
Check
Command
Buffer Empty Check
Read: FCLKDIV register
2.
3.
1.
FDIVLD
yes
Write: FCMD register
Program Command 0x20
Write: FSTAT register
Clear CBEIF 0x80
Figure 87. Example Program Command Flow
START
Write: Flash Array Address
and Program Data
Set?
Read: FSTAT register
Read: FSTAT register
ACCERR/PVIOL
yes
CBEIF
yes
no
CCIF
EXIT
Write: FCLKDIV register
Set?
Set?
Set?
no
no
yes
no
Write: FSTAT register
Clear ACCERR/PVIOL 0x30
NOTE: FCLKDIV needs to
be set after each reset
Figure
32 kbyte Flash Module (S12SFTSR32KV1)
88. The burst program command write
MM912F634
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