MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 133

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Table 164. Timer Toggle On Overflow Register 1 (TTOV)
Note:
Functional Description and Application Information
4.18.3.3.7
Offset
121.
Freescale Semiconductor
Table 163. TSCR1 - Register Field Descriptions
Table 165. TTOV - Register Field Descriptions
Reset
W
R
TOV[3-0]
(121)
TFFCA
Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.
Field
Field
TEN
3-0
7
4
0xC7
7
0
0
Timer Enable
1 = Enables the timer.
0 = Disables the timer. (Used for reducing power consumption).
Timer Fast Flag Clear All
1 = For TFLG1 register, a read from an input capture or a write to the output compare channel [TC 3:0] causes the
corresponding channel flag, CnF, to be cleared.For TFLG2 register, any access to the TCNT register clears the TOF flag.
Any access to the PACNT registers clears the PAOVF and PAIF bits in the PAFLG register. This has the advantage of
eliminating software overhead in a separate clear sequence. Extra care is required to avoid accidental flag clearing due to
unintended accesses.
0 = Allows the timer flag clearing.
Toggle On Overflow Bits
1 = Toggle output compare pin on overflow feature enabled.
0 = Toggle output compare pin on overflow feature disabled.
Timer Toggle On Overflow Register 1 (TTOV)
TOVn toggles output compare pin on overflow. This feature only takes effect when the
corresponding channel is configured for an output compare mode. When set, an overflow
toggle on the output compare pin takes precedence over forced output compare events.
6
0
0
0
0
5
NOTE
0
0
4
Description
Description
TOV3
0
3
Basic Timer Module - TIM (TIM16B4C)
TOV2
0
2
TOV1
1
0
Access: User read/write
MM912F634
TOV0
0
0
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