MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 285

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Functional Description and Application Information
4.36.4.1.2
The Flash command controller is used to supervise the command write sequence to execute program, erase, and erase verify
algorithms.
Before starting a command write sequence, the ACCERR and PVIOL flags in the FSTAT register must be clear and the CBEIF
flag must be set (see
A command write sequence consists of three steps which must be strictly adhered to with writes to the Flash module
not permitted between the steps. However, Flash register and array reads are allowed during a command write
sequence. The basic command write sequence is as follows:
Once a command is launched, the completion of the command operation is indicated by the setting of the CCIF flag in the FSTAT
register with an interrupt generated, if enabled. The CCIF flag will set upon completion of all active and buffered burst program
commands.
4.36.4.2
Table 383
Freescale Semiconductor
Table 383. Flash Command Description
1.
2.
3.
FCMDB
0x05
0x20
0x25
0x40
0x41
0x75
Write to a valid address in the Flash array memory.
Write a valid command to the FCMD register.
Clear the CBEIF flag in the FSTAT register by writing a 1 to CBEIF to launch the command.
summarizes the valid Flash commands along with the effects of the commands on the Flash block.
Set Verify Margin
Flash Commands
Burst Program
Sector Erase
Command Write Sequence
A Flash block address must be in the erased state before being programmed. Cumulative
programming of bits within a Flash block address is not allowed except for the status field
updates required in EEPROM emulation applications.
Erase Verify
Mass Erase
Command
Program
Level
NVM
Section
4.36.3.4).
Verify all memory bytes in the Flash array memory are erased. If the Flash array memory is erased,
the BLANK flag in the FSTAT register will set upon command completion.
Program an address in the Flash array.
Program an address in the Flash array with the internal address incrementing after the program
operation.
Erase all memory bytes in a sector of the Flash array.
Erase all memory bytes in the Flash array. A mass erase of the full Flash array is only possible when
no protection is enabled prior to launching the command.
Set sense-amp margin levels for verifying Flash array contents (special mode only).
CAUTION
Function on Flash Memory
32 kbyte Flash Module (S12SFTSR32KV1)
MM912F634
285