MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 130

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Table 152. Timer Input Capture/Output Compare Select (TIOS)
Table 154. Timer Compare Force Register (CFORC)
Note:
Note:
Functional Description and Application Information
4.18.3.3
This section consists of register descriptions in address order. Each description includes a standard register diagram with an
associated figure number. Details of register bit and field function follow the register diagrams, in bit order.
4.18.3.3.1
4.18.3.3.2
Freescale Semiconductor
Offset
115.
Offset
116.
Table 153. TIOS - Register Field Descriptions
Table 155. CFORC - Register Field Descriptions
Reset
Reset
W
W
R
R
FOC[3-0]
IOS[3-0]
(115)
(116)
Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.
Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.
Field
Field
3-0
3-0
0xC0
0xC1
Register Descriptions
7
0
0
7
0
0
Input Capture or Output Compare Channel Configuration
0 - The corresponding channel acts as an input capture.
1 - The corresponding channel acts as an output compare.
Force Output Compare Action for Channel 3-0
0 - Force Output Compare Action disabled. Input Capture or Output Compare Channel Configuration
1 - Force Output Compare Action enabled
Timer Input Capture/Output Compare Select (TIOS)
Timer Compare Force Register (CFORC)
6
0
0
6
0
0
0
0
0
0
5
5
0
0
0
0
4
4
Description
Description
FOC3
IOS3
0
0
0
3
3
Basic Timer Module - TIM (TIM16B4C)
FOC2
IOS2
0
0
0
2
2
FOC1
IOS1
1
0
1
0
0
Access: User read/write
Access: User read/write
MM912F634
FOC0
IOS0
0
0
0
0
0
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