MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 95

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Table 116. PWM Scale A Register (PWMSCLA)
Note:
Functional Description and Application Information
4.13.3.3
PWMSCLA is the programmable scale value used in scaling clock A to generate clock SA. Clock SA is generated by taking clock
A, dividing it by the value in the PWMSCLA register and dividing that by two.
Any value written to this register will cause the scale counter to load the new scale value (PWMSCLA)
4.13.3.4
PWMSCLB is the programmable scale value used in scaling clock B to generate clock SB. Clock SB is generated by taking clock
B, dividing it by the value in the PWMSCLB register and dividing that by two.
Any value written to this register will cause the scale counter to load the new scale value (PWMSCLB).
Freescale Semiconductor
Offset
89.
Reset
.
W
R
(89)
Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.
0x62
Bit 7
PWM Scale A Register (PWMSCLA)
PWM Scale B Register (PWMSCLB)
7
0
When PWMSCLA = $00, PWMSCLA value is considered a full scale value of 256. Clock A
is thus divided by 512.
Clock SA = Clock A / (2 * PWMSCLA)
When PWMSCLB = $00, PWMSCLB value is considered a full scale value of 256. Clock B
is thus divided by 512.
Clock SB = Clock B / (2 * PWMSCLB)
Table 115. Clock A Prescaler Selects
6
0
PCKA2
6
0
0
0
0
1
1
1
1
0
5
5
PCKA1
0
0
1
1
0
0
1
1
NOTE
NOTE
0
4
4
PCKA0
0
1
0
1
0
1
0
1
0
3
3
Value of Clock A
D2D clock / 128
D2D clock / 16
D2D clock / 32
D2D clock / 64
D2D clock / 2
D2D clock / 4
D2D clock / 8
D2D clock
0
2
2
PWM Control Module (PWM8B2C)
1
0
1
Access: User read/write
MM912F634
Bit 0
0
0
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