MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 267

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Functional Description and Application Information
4.35.3.2.2
This register is used to restart the COP timeout period.
Table 345. ARMCOP Register Diagram
Read: Always reads $00
Write: Anytime
When the COP is disabled (CR[2:0] = “000”), writing to this register has no effect.
When the COP is enabled by setting CR[2:0] non-zero, the following applies:
4.35.4
The COP (free running watchdog timer) enables the user to check that a program is running and sequencing properly. When the
COP is being used, software is responsible for keeping the COP from timing out. If the COP times out, it is an indication that the
software is no longer being executed in the intended sequence; thus a system reset is initiated. The COP runs on the CRG
internal reference clock. Three control bits in the COPCTL register allow a selection of seven COP timeout periods.
When COP is enabled, the program must write $55 and $AA (in this order) to the ARMCOP register during the selected timeout
period. Once this is done, the COP timeout period is restarted. If the program fails to do this and the COP times out, the part will
reset. Also, if any value other than $55 or $AA is written, the part is immediately reset.Sequences of $55 writes or sequences of
$AA writes are allowed if the WCOP bit is not set.
The window COP operation is enabled by setting WCOP in the COPCTL register. When the WCOP bit is set while COP is
enabled, a write to the ARMCOP register must occur in the last 25% of the selected period. A premature write will immediately
reset the part. As long as all writes occur during the 25% window, $55 can be written as often as desired. Once $AA is written
after the $55, the timeout logic restarts, and the user must wait until the next window before writing to the ARMCOP register.
If the COPRSTP bit is set, the COP will continue to run in Stop mode.
The COP continues to run during Wait mode if the COPSWAI bit is cleared.
Freescale Semiconductor
0x003F
Reset
W
R
Writing any value other than $55 or $AA causes a COP reset. To restart the COP timeout period, you must write $55
followed by a write of $AA. Other instructions may be executed between these writes, but the sequence ($55, $AA) must
be completed prior to the COP end of timeout period to avoid a COP reset. Sequences of $55 writes or sequences of
$AA writes are allowed if the WCOP bit is not set. When the WCOP bit is set, $55 and $AA writes must be done in the
last 25% of the selected timeout period. Writing any value in the first 75% of the selected period will cause a COP reset.
Only sequences of $55 are allowed if the WCOP bit is set.
Functional Description
Bit 7
0
0
7
COP Timer Arm/Reset Register (ARMCOP)
Bit 6
0
0
6
Bit 5
5
0
0
Bit 4
0
0
4
Bit 3
0
0
3
Computer Operating Properly (S12SCOPV1)
Bit 2
0
0
2
Bit 1
1
0
0
MM912F634
Bit 0
0
0
0
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