MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 57

no-image

MM912H634DM1AER2

Manufacturer Part Number
MM912H634DM1AER2
Description
16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MM912H634DM1AER2

Rohs
yes
Core
HCS12
Processor Series
MM912F634
Data Bus Width
16 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
32 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
5.5 V to 18 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
15
Interface Type
SPI
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
15
Number Of Timers
1
Program Memory Type
Flash
Supply Voltage - Max
18 V
Supply Voltage - Min
5.5 V
Functional Description and Application Information
For internal reset sources, the RESET_A pin is driven low for t
pin is released. With a high detected on the RESET_A pin, VDD>V
Normal mode.
To avoid short-circuit conditions being present for a long time, a t
with VS1 > (V
The Reset Status Register (RSR) will indicate the source of the reset by individual flags.
See also
4.3.3
In Normal mode, all MM912F634 analog die user functions are active and can be controlled by the D2D Interface. Both regulators
(VDD and VDDX) are active and operate with full current capability.
Once entered in Normal mode, the Watchdog will operate as a simple non-window watchdog with an initial timeout (t
be reset via the D2D Interface. After the initial reset, the watchdog will operate in standard window mode. See
“Window Watchdog"
4.3.4
The Stop mode will allow reduced current consumption with fast startup time. In this mode, both voltage regulators (VDD and
VDDX) are active, with limited current drive capability. In this condition, the MCU is supposed to operate in Low Power mode
(STOP or WAIT).
The device can enter in Stop mode by configuring the Mode Control Register (MCR) via the D2D Interface. The MCU has to enter
a Low Power mode immediately afterwards executing the STOP or WAIT instruction. The Wake-up Source Register (WSR) has
to be read after a wake-up condition in order to execute a new STOP mode command. Two base clock cycles (f
required between WSR read and MCR write.
While in Stop mode, the MM912F634 analog die will wake up on the following sources:
After Wake-up from the sources listed above, the device will transit to Normal mode.
Reset will wake up the device directly to Reset mode.
See
Freescale Semiconductor
Section 4.8, “Wake-up / Cyclic Sense"
POR - Power On Reset
LVR - Low Voltage Reset VDD
LVRX - Low Voltage Reset VDDX
WDR - Watchdog Reset
EXR - External Reset
WUR - Wake-up Sleep Reset
Lx - Wake-up (maskable with selectable cyclic sense)
Forced Wake-up (configurable timeout)
LIN Wake-up
D2D Wake-up (special command)
Section 4.7,
LVRI
Normal Mode
Stop Mode
+ V
To avoid any pending analog die interrupts prevent the MCU from entering MCU stop
resulting in unexpected system behavior, the analog die IRQ sources should be disabled
and the corresponding flags be cleared before entering stop.
for details.
LVR _H
“Resets".
) for more than t
for details.
VTO
, the MM912F634 analog die will transit directly to Sleep mode.
NOTE
RST
VTO
after the reset condition is gone. After this delay, the RESET_A
LVR
timeout is implemented. Once VDD < V
and VDDX>V
LVRX
the MM912F634 analog die enters in
LVR
Modes of Operation
or VDDX < V
Section 4.9,
BASE
MM912F634
) delay are
IWDTO
LVRX
) to
57

Related parts for MM912H634DM1AER2