MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 156

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Table 208. Trimming Register 2 (CTR2)
Functional Description and Application Information
4.25.1.2.3
Note:
Freescale Semiconductor
146.
Table 209. CTR2 - Register Field Descriptions
Offset
Table 207. CTR1 - Register Field Descriptions
Reset
SLPBG_LOCK
IREFTR2…0
BGTRIMUP
BGTRIMDN
SLPBGTRE
W
R
IREFTRE
CTR1_6
BGTRE
(146)
Field
Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.
Field
2-0
7
6
5
4
3
4
3
0xF2
0
0
7
Bandgap trim enable
0 - no trim can be done
1 - trim can be done by setting BGTRIMUP and BGTRIMDN bits
Spare Trim Bit
Bandgap trim up bit
0 - default slope
1 - increase bandgap slope
Bandgap trim down bit
0 - default slope
1 - decrease bandgap slope
Iref trim enable bit
0 - no trim can be done
1 - trim can be done by setting IREFTR[2:0] bits
Iref trim - This trim is used to adjust the internal zero TC current reference
000: 0%
001: +7.6%
010: +16.43%
011: +26.83%
100: -8.54%
101: -15.75%
110: -21.79%
111: 0%
Sleep Bandgap trim enable
0 no trim can be done
1 trim lock can be done by setting SLPBGTR[2:0] bits and SLPBG_LOCK bit
bg1p25sleep trim lock bit
Trimming Register 2 (CTR2)
0
0
6
0
0
5
SLPBGTRE
4
0
Description
Description
SLPBG_LOCK
3
0
SLPBGTR2
MM912F634 - Analog Die Trimming
0
2
SLPBGTR1
0
1
Access: User read/write
MM912F634
SLPBGTR0
0
0
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