MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 171

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Table 228. DDRC Register Field Descriptions
Table 230. DDRD Register Field Descriptions
Table 227. Port C Data Direction Register (DDRC)
Table 229. Port D Data Direction Register (DDRD)
Note:
Note:
Functional Description and Application Information
4.27.3.7
160.
4.27.3.8
161.
Freescale Semiconductor
Address 0x0006
Address 0x0007
Reset
Reset
DDRC
DDRD
Field
Field
W
W
R
R
1-0
7-0
Read: Anytime.
Read: Anytime.
Write: Anytime.
Write: Anytime.
Port C Data Direction—
This register controls the data direction of pins 1 and 0.
The D2DI function controls the data direction for the associated pins. In this case the data direction bits will not change.
When operating a pin as a general purpose I/O, the associated data direction bit determines whether it is an input or output.
1 Associated pin is configured as output.
0 Associated pin is configured as high-impedance input.
Port D Data Direction—
This register controls the data direction of pins 7 through 0.
The D2DI function controls the data direction for the associated pins. In this case the data direction bits will not change.
When operating a pin as a general purpose I/O, the associated data direction bit determines whether it is an input or output.
1 Associated pin is configured as output.
0 Associated pin is configured as high-impedance input.
DDRD7
Port C Data Direction Register (DDRC)
Port D Data Direction Register (DDRD)
7
0
0
7
0
DDRD6
6
0
0
6
0
DDRD5
0
0
0
5
5
DDRD4
0
0
0
4
4
Description
Description
DDRD3
0
0
0
3
3
Port Integration Module (9S12I32PIMV1)
DDRD2
0
0
0
2
2
DDRC1
DDRD1
Access: User read/write
Access: User read/write
0
0
1
1
MM912F634
DDRC0
DDRD0
0
0
0
0
171
(160)
(161)