MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 125

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Table 145. Port B Configuration Register 1 (PTBC1)
Table 147. Port B Configuration Register 2 (PTBC2)
Note:
Note:
Functional Description and Application Information
4.17.4
4.17.4.1
Offset
108.
4.17.4.2
Offset
109.
Freescale Semiconductor
Table 146. PTBC1 - Register Field Descriptions
Table 148. PTBC2 - Register Field Descriptions
Reset
Reset
W
W
R
R
DDRB[2-0]
PUEB[2-0]
SERMOD
PWMCS
PWMEN
(108)
(109)
Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.
Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.
Field
Field
6-4
2-0
1-0
3
2
0x20
0x21
Register definition
Port B Configuration Register 1 (PTBC1)
Port B Configuration Register 2 (PTBC2)
7
0
0
7
0
0
Pull-up Enable Port B[2…0]
0 - Pull-up disabled on PTBx pin.
1- Pull-up enabled on PTBx pin.
Data Direction Port B[2….0]
0 - PTBx configured as input.
1 - PTBx configured as output.
PWM Channel Select PTB2. See
0 - PWM Channel 0 selected as PWM Channel for PTB2
1 - PWM Channel 1 selected as PWM Channel for PTB2
PWM Enable for PTB2. See
0 - PWM disabled on PTB2
1 - PWM enabled on PTB2 (Channel as selected with PWMCS)
Serial Mode Select for PTB0 and PTB1. See
00 - Mode 0, SCI internally connected the LIN Physical Layer Interface. PTB0 and PTB1 are Digital I/Os
01 - Mode 1, SCI connected to PTB0 and PTB1 (external SCI mode)
10 - Mode 2, LIN Physical Layer Interface connected to PTB0 and PTB1 (external LIN mode)
11 - Mode 3, SCI internally connected the LIN Physical Layer Interface and PTB0 and PTB1 are connected both as outputs
The pull-up resistor is not active once the port is configured as an output.
(Observe mode)
PUEB2
6
0
6
0
0
Section 4.13, “PWM Control Module
PUEB1
0
0
0
5
5
Section 4.13, “PWM Control Module
Figure 34
PUEB0
NOTE
0
0
0
4
4
Description
Description
for details.
PWMCS
(PWM8B2C)".
0
0
0
3
3
(PWM8B2C)".
PWMEN
DDRB2
0
0
2
2
General Purpose I/O - PTB[0…2]
DDRB1
1
0
1
0
Access: User read/write
Access: User read/write
SERMOD
MM912F634
DDRB0
0
0
0
0
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