MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 317

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Functional Description and Application Information
4.38.3.2.3
Table 407. SPI Baud Rate Register (SPIBR)
Read: Anytime
Write: Anytime; writes to the reserved bits have no effect
Table 408. SPIBR Field Descriptions
The baud rate divisor equation is as follows:
The baud rate can be calculated with the following equation:
Table 409. Example SPI Baud Rate Selection (20 MHz Bus Clock)
Freescale Semiconductor
0x00EA
Reset
SPPR[2:0]
SPR[2:0]
W
SPPR2
R
Field
6–4
2–0
0
0
0
Table 406. Bidirectional Pin Configurations
SPI Baud Rate Preselection Bits — These bits specify the SPI baud rates as shown in
of these bits will abort a transmission in progress and force the SPI system into idle state.
SPI Baud Rate Selection Bits — These bits specify the SPI baud rates as shown in
these bits will abort a transmission in progress and force the SPI system into idle state.
Bidirectional
Bidirectional
0
0
7
Pin Mode
SPI Baud Rate Register (SPIBR)
For maximum allowed baud rates, refer to
Normal
Normal
SPPR1
0
0
0
SPPR2
0
6
SPC0
SPPR0
0
1
0
1
Baud Rate = BusClock / BaudRateDivisor
BaudRateDivisor = (SPPR + 1)  2
0
0
0
BIDIROE
SPPR1
5
0
X
X
0
1
0
1
SPR2
0
0
0
Master Mode of Operation
Slave Mode of Operation
SPPR0
MISO not used by SPI
NOTE
Section 3.6.2.4, “SPI Timing"
0
4
SPR1
0
0
1
Slave Out
Master In
Slave I/O
Slave In
Description
MISO
SPR0
(SPR + 1)
0
0
0
1
0
3
Serial Peripheral Interface (S12SPIV4)
Baud Rate
SPR2
MOSI not used by SPI
Divisor
0
2
in this data sheet.
Table
2
4
8
Table
Master Out
Master I/O
Master In
Slave In
MOSI
409. In master mode, a change of
409. In master mode, a change
SPR1
1
0
Baud Rate
10.0 MHz
5.00 MHz
2.50 MHz
MM912F634
SPR0
0
0
Eqn. 2
Eqn. 3
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