MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 259

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MM912H634DM1AER2

Manufacturer Part Number
MM912H634DM1AER2
Description
16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MM912H634DM1AER2

Rohs
yes
Core
HCS12
Processor Series
MM912F634
Data Bus Width
16 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
32 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
5.5 V to 18 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
15
Interface Type
SPI
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
15
Number Of Timers
1
Program Memory Type
Flash
Supply Voltage - Max
18 V
Supply Voltage - Min
5.5 V
Functional Description and Application Information
4.34.6
4.34.6.1
A summary of the registers associated with the RTI module is shown in
Table 336. RTI Register Summary
4.34.6.2
This section describes in address order all the S12SCRG registers and their individual bits
4.34.6.2.1
This register controls the RTI (Real Time Interrupt).
Table 337. RTI Control Register (RTICTL)
Read: Anytime
Write: Refer to each bit for individual write conditions
Table 338. RTICTL Field Descriptions
Freescale Semiconductor
0x003C
Address
0x003C
0x003D
Reset
WRTMASK
RTIFRZ
W
R
Field
RTIF
7
6
5
1
RTICNT
RTICTL
Name
Memory Map and Register
Real Time Interrupt Flag — RTIF is set to 1 at the end of the RTI period. This flag is cleared by writing a 1. Writing a 0 has no
effect The flag cannot be set by writing a 1. If enabled (RTIE = 1), RTIF causes an interrupt request.
0 RTI time-out has not yet occurred.
1 RTI time-out has occurred.
Real Time Interrupt Freeze — RTIFRZ controls if RTI is frozen during BDM active mode
Special modes: Write anytime
Normal modes: Write to “1” but not to “0”
0 RTI keeps running in BDM active mode
1 RTI frozen during BDM active mode
Write Mask for RTIF, RTISWAI, RTIRSTP, RTIE and RTIRT[1:0] Bits — This write-only bit serves as a mask for bit 7 and bits
4 to 0 of the RTICTL register while writing to this register. It is intended for BDM writing the RTIFRZ without touching the contents
of RTIF, RTISWAI, RTIRSTP, RTIE and RTIRT[1:0] Bits.
0 Write of RTIF, RTISWAI, RTIRSTP, RTIE and RTIRT[1:0] Bits has an effect with this write of RTICTL
1 Write of RTIF, RTISWAI, RTIRSTP, RTIE and RTIRT[1:0] Bits has no effect with this write of RTICTL.
RTIF
Module Memory Map
Register Descriptions
0
7
(Does not count for “write once”.)
RTI Control Register (RTICTL)
W
W
W
R
R
RTIFRZ
RTICNT7
RTIF
Bit 7
0
6
RTICNT6
WRTMASK
RTIFRZ
6
5
0
0
WRTMASK
RTICNT5
RTISWAI
5
0
0
4
Description
RTICNT4
RTISWAI
4
RTIRSTP
Table
0
3
336.
RTIRSTP
RTICNT3
3
RTIE
0
2
RTICNT2
Real Time Interrupt (S12SRTIV1)
RTIE
2
RTIRT1
RTICNT1
RTIRT1
1
0
1
MM912F634
RTIRT0
RTICNT0
RTIRT0
Bit 0
0
0
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