MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 178

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Functional Description and Application Information
The user is advised to refer to the SoC Guide for port configuration and location of external bus signals. Some pins may not be
bonded out in all implementations.
Table 239
4.28.2
4.28.2.1
A summary of the registers associated with the MMC block is shown in
are given in the subsections that follow.
4.28.2.2
4.28.2.2.1
Table 240. Program Page Index Register (PPAGE)
Read: Anytime
Write: Anytime
These four index bits are used to page 16 kByte blocks into the Flash page window located in the local (CPU or BDM) memory
map from address 0x8000 to address 0xBFFF (see
Freescale Semiconductor
Address: 0x0030
Address
0x0030
0x0031
0x0032
0x0033
Reset
W
R
Table 239. External Input Signals Associated with the MMC
outlines the pin names and functions. It also provides a brief description of their operation.
MMCCTL1
Register
Memory Map and Registers
DIRECT
PPAGE
MODE
Name
Module Memory Map
Register Descriptions
1
1
7
MODC
Signal
Program Page Index Register (PPAGE)
Writes to this register using the special access of the CALL and RTC instructions will be
complete before the end of the instruction execution.
W
W
W
W
R
R
R
R
1
1
6
MODC
DP15
Bit 7
1
0
I/O
I
Figure 48. MMC Register Summary
DP14
5
1
1
6
1
0
0
Figure
Description
Mode input
DP13
49). This supports accessing up to 256 Kilobytes of Flash (in the
5
1
0
0
NOTE
1
1
4
DP12
Figure
4
1
0
0
PIX3
1
3
48. Detailed descriptions of the registers and bits
DP11
PIX3
Memory Mapping Control (S12SMMCV1)
3
0
0
PIX2
1
2
RESET (active low)
Latched after
Availability
DP10
PIX2
2
0
0
PIX1
1
1
PIX1
DP9
1
0
0
MM912F634
PIX0
IFRON
Bit 0
PIX0
DP8
0
0
0
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