MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 329

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Functional Description and Application Information
Table 413. Normal Mode and Bidirectional Mode
The direction of each serial I/O pin depends on the BIDIROE bit. If the pin is configured as an output, serial data from the shift
register is driven out on the pin. The same pin is also the serial input to the shift register.
4.38.4.6
The SPI has one error condition:
4.38.4.6.1
If the SS input becomes low while the SPI is configured as a master, it indicates a system error where more than one master may
be trying to drive the MOSI and SCK lines simultaneously. This condition is not permitted in normal operation. The MODF bit in
the SPI status register is set automatically, provided the MODFEN bit is set.
In the special case where the SPI is in master mode and MODFEN bit is cleared, the SS pin is not used by the SPI. In this case,
the mode fault error function is inhibited and MODF remains cleared. In case the SPI system is configured as a slave, the SS pin
is a dedicated input pin. Mode fault error doesn’t occur in slave mode.
If a mode fault error occurs, the SPI is switched to slave mode, with the exception that the slave output buffer is disabled. So
SCK, MISO, and MOSI pins are forced to be high-impedance inputs, to avoid any possibility of conflict with another output driver.
A transmission in progress is aborted and the SPI is forced into idle state.
If the mode fault error occurs in the bidirectional mode for a SPI system configured in master mode, output enable of the MOMI
(MOSI in bidirectional mode) is cleared if it was set. No mode fault error occurs in the bidirectional mode for SPI system
configured in slave mode.
The mode fault flag is cleared automatically by a read of the SPI status register (with MODF set), followed by a write to the SPI
control register 1. If the mode fault flag is cleared, the SPI becomes a normal master or slave again.
Freescale Semiconductor
Bidirectional Mode
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When SPE = 1
Normal Mode
SPC0 = 0
SPC0 = 1
The SCK is output for the master mode and input for the slave mode.
The SS is the input or output for the master mode, and it is always the input for the slave mode.
The bidirectional mode does not affect SCK and SS functions.
Mode fault error
Error Conditions
Mode Fault Error
If a mode fault error occurs and a received data byte is pending in the receive shift register,
this data byte will be lost.
Serial Out
Serial Out
Serial In
SPI
Serial In
SPI
Master Mode MSTR = 1
BIDIROE
NOTE
MOMI
MOSI
MISO
Serial Out
Serial In
Serial Out
SPI
Serial In
SPI
Serial Peripheral Interface (S12SPIV4)
Slave Mode MSTR = 0
BIDIROE
SISO
MM912F634
MOSI
MISO
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