MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 128

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Functional Description and Application Information
4.18.2
4.18.2.1
The TIM16B4C module is internally connected to the PTB (IOC0, IOC1, IOC2) and to the Rx signal as specified in
“General Purpose I/O - PTB[0…2]"
4.18.2.2
4.18.2.2.1
This pin serves as input capture or output compare for channel 3 and is internally connected to the Rx signal as specified in
Section 4.17.2, “Alternative SCI / LIN
4.18.2.2.2
This pin serves as an input capture or output compare for channel 2 and can be routed to the PTB2 general purpose I/O.
4.18.2.2.3
This pin serves as an input capture or output compare for channel 1 and can be routed to the PTB1 general purpose I/O.
4.18.2.2.4
This pin serves as an input capture or output compare for channel 0 and can be routed to the PTB0 general purpose I/O.
4.18.3
4.18.3.1
This section provides a detailed description of all memory and registers.
4.18.3.2
The memory map for the TIM16B4C module is given below in
Freescale Semiconductor
Table 151. Module Memory Map
Offset
0xC0
0xC1
0xC2
0xC3
0xC4
0xC5
0xC6
0xC7
(111)
Signal Description
Memory Map and Registers
Overview
Detailed Signal Descriptions
Overview
Module Memory Map
IOC3 – Input Capture and Output Compare Channel 3
Since the Rx signal is only available as an input, using the output compare feature for this
channel would have no effect.
IOC2 – Input Capture and Output Compare Channel 2
IOC1 – Input Capture and Output Compare Channel 1
IOC0 – Input Capture and Output Compare Channel 0
For the description of interrupts see
Timer Input Capture/Output Compare Select (TIOS)
(IOC3).
Functionality".
Output Compare 3 Mask Register (OC3M)
Timer System Control Register 1 (TSCR1)
Output Compare 3 Data Register (OC3D)
Timer Compare Force Register (CFORC)
Timer Toggle Overflow Register (TTOV)
Timer Count Register (TCNT(hi))
Timer Count Register (TCNT(lo))
Section 4.18.6,
Use
NOTE
NOTE
Table
151.
“Interrupts".
Basic Timer Module - TIM (TIM16B4C)
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Access
Section 4.17,
MM912F634
(112)
(113)
(112)
128