MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 301

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MM912H634DM1AER2

Manufacturer Part Number
MM912H634DM1AER2
Description
16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MM912H634DM1AER2

Rohs
yes
Core
HCS12
Processor Series
MM912F634
Data Bus Width
16 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
32 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
5.5 V to 18 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
15
Interface Type
SPI
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
15
Number Of Timers
1
Program Memory Type
Flash
Supply Voltage - Max
18 V
Supply Voltage - Min
5.5 V
Functional Description and Application Information
4.37.1.3
4.37.1.3.1
The D2DI stops working in STOP/WAIT mode. The D2DCLK signal as well as the data signals used are driven low (only after the
end of the current high phase, as defined by D2DCLKDIV).
Waking from STOP/WAIT mode, the D2DCLK line starts clocking again and the data lines will be driven low until the first
transaction starts.
STOP and WAIT mode are entered by different CPU instructions. In the WAIT mode, the behavior of the D2DI can be configured
(D2DSWAI). Every (enabled) interrupt can be used to leave the STOP and WAIT mode.
4.37.1.3.2
The MCU can enter a special mode (used for test and debugging purposes as well as programming the FLASH). In the D2DI the
“write-once” feature is disabled. See the MCU description for details.
4.37.2
The D2DI optionally uses 6 or 10 port pins. The functions of those pins depends on the settings in the D2DCTL0 register, when
the D2DI module is enabled.
4.37.2.1
When the D2DI is enabled this pin is the clock output. This signal is low if the initiator is disabled, in STOP mode or in WAIT mode
(with D2DSWAI asserted), otherwise it is a continuos clock. This pin may be shared with general purpose functionality if the D2DI
is disabled.
4.37.2.2
When the D2DI is enabled and the interface connection width D2DCW is set to be 8-bit wide, those lines carry the data bits 7:4
acting as outputs or inputs. When they act as inputs pull-down elements are enabled. If the D2DI is disabled or if the interface
connection width is set as 4-bit wide, the pins may be shared with general purpose pin functionality.
4.37.2.3
When the D2DI is enabled those lines carry the data bits 3:0 acting as outputs or inputs. When they act as inputs pull-down
elements are enabled. If the D2DI is disabled the pins and may be shared with general purpose pin functionality.
4.37.2.4
The D2DINT is an active input interrupt input driven by the target device. The pin has an active pull-down device. If the D2DI is
disabled, the pin may be shared with general purpose pin functionality.
Freescale Semiconductor
Clock halt on system STOP
Configurable for 4- or 8-bit wide transfers
Configurable timeout period
Non-maskable interrupt on transaction errors
Transaction Status and Error Flags
Interrupt enable for receiving interrupt (from D2D target)
External Signal Description
Modes of Operation
D2DCLK
D2DDAT[7:4]
D2DDAT[3:0]
D2DINT
D2DI in STOP/WAIT Mode
D2DI in special modes
The maximum allowed D2D target frequency (f
initiator frequency.
NOTE
D2D
) might be lower than the maximum
Die-to-Die Initiator (D2DIV1)
MM912F634
301

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