MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 275

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Functional Description and Application Information
The security feature in the Flash module is described in
4.36.3.3.3
The FRSV0 register is reserved for factory testing.
Table 357. Flash Reserved0 Register (FRSV0)
All bits in the FRSV0 register read 0 and are not writable.
4.36.3.3.4
The FCNFG register enables the Flash interrupts and gates the security backdoor writes.
Table 358. Flash Configuration Register (FCNFG)
CBEIE, CCIE, and KEYACC bits are readable and writable, while all remaining bits read 0 and are not writable. KEYACC is only
writable if KEYEN is set to the enabled state (see
Table 359. FCNFG Field Descriptions
Freescale Semiconductor
0x0102
0x0103
Reset
Reset
KEYACC
W
W
CBEIE
R
R
Field
CCIE
7
6
5
CBEIE
Command Buffer Empty Interrupt Enable — The CBEIE bit enables an interrupt in case of an empty command buffer in the
Flash module.
0 Command buffer empty interrupt disabled.
1 An interrupt will be requested whenever the CBEIF flag (see
Command Complete Interrupt Enable — The CCIE bit enables an interrupt in case all commands have been completed in
the Flash module.
0 Command complete interrupt disabled.
1 An interrupt will be requested whenever the CCIF flag (see
Enable Security Key Writing
0 Writes to the Flash block are interpreted as the start of a command write sequence.
1 Writes to the Flash block are interpreted as keys to open the backdoor.
0
0
0
7
7
Flash Reserved0 Register (FRSV0)
Flash Configuration Register (FCNFG)
Flash array reads are allowed while KEYACC is set.
CCIE
0
0
0
6
6
KEYACC
5
0
0
5
0
Section 4.36.3.3.2, “Flash Security Register
Section 4.36.6, “Flash Module
NOTE
0
0
0
0
4
4
Description
Section 4.36.3.4, “Flash Status Register
Section 4.36.3.4, “Flash Status Register (FSTAT)"”)
0
0
0
0
3
3
32 kbyte Flash Module (S12SFTSR32KV1)
Security"”.
0
0
0
0
2
2
(FSEC)"”.
1
0
0
1
0
0
(FSTAT)"”) is set.
MM912F634
is set.
0
0
0
0
0
0
275