MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 230

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Functional Description and Application Information
4.31.3.2.8.6
Table 303. Debug Comparator Data Low Register (DBGADL)
Read: If COMRV[1:0] = 00
Write: If COMRV[1:0] = 00 and DBG not armed.
Table 304. DBGADL Field Descriptions
4.31.3.2.8.7
Table 305. Debug Comparator Data High Mask Register (DBGADHM)
Read: If COMRV[1:0] = 00
Write: If COMRV[1:0] = 00 and DBG not armed.
Table 306. DBGADHM Field Descriptions
Freescale Semiconductor
Address: 0x002D
Address: 0x002E
Reset
Reset
Bits[15:8]
Bits[7:0]
W
W
R
R
Field
Field
7–0
7–0
Comparator Data Low Compare Bits — The Comparator data low compare bits control whether the selected comparator
compares the data bus bits [7:0] to a logic one or logic zero. The comparator data compare bits are only used in comparison if
the corresponding data mask bit is logic 1. This register is available only for comparator A. Data bus comparisons are only
performed if the TAG bit in DBGACTL is clear
0 Compare corresponding data bit to a logic zero
1 Compare corresponding data bit to a logic one
Bit 15
Comparator Data High Mask Bits — The Comparator data high mask bits control whether the selected comparator compares
the data bus bits [15:8] to the corresponding comparator data compare bits. Data bus comparisons are only performed if the
TAG bit in DBGACTL is clear
0 Do not compare corresponding data bit. Any value of corresponding data bit allows match.
1 Compare corresponding data bit
Bit 7
0
0
7
7
Debug Comparator Data Low Register (DBGADL)
Debug Comparator Data High Mask Register (DBGADHM)
Bit 14
Bit 6
0
0
6
6
Bit 13
Bit 5
5
0
5
0
Bit 12
Bit 4
0
0
4
4
Description
Description
Bit 11
Bit 3
0
0
3
3
Bit 10
Bit 2
S12S Debug (S12SDBGV1) Module
0
0
2
2
Bit 1
Bit 9
1
0
1
0
MM912F634
Bit 0
Bit 8
0
0
0
0
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