MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 181

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Functional Description and Application Information
4.28.2.2.3
Table 244. Mode Register (MODE)
Read: Anytime.
Write: Only if a transition is allowed (see
The MODC bit of the MODE register is used to establish the MCU operating mode.
Table 245. MODE Field Descriptions
Freescale Semiconductor
Address: 0x0032
Note:
168.
Reset
W
R
MODC
Transition done by external pins (MODC)
Transition done by write access to the MODE register
Field
External signal (see
7
RESET
RESET
MODC
MODC
Mode Select Bit — This bit controls the current operating mode during RESET high (inactive). The external mode pin MODC
determines the operating mode during RESET low (active). The state of the pin is registered into the respective register bit
after the RESET signal goes inactive (see
Write restrictions exist to disallow transitions between certain modes.
Attempting non authorized transitions will not change the MODE bit, but it will block further writes to the register bit except in
special modes.
Changes of operating modes are not allowed when the device is secured, but it will block further writes to the register bit except
in special modes.
7
Mode Register (MODE)
(168)
1
Table
Single-Chip
Normal
239).
Figure 51. Mode Transition Diagram when MCU is Unsecured
(NS)
0
0
6
1
Figure
5
0
0
51).
Figure
1
51).
0
0
4
Description
0
0
3
Figure 51
Single-Chip
Special
(SS)
0
Memory Mapping Control (S12SMMCV1)
illustrates all allowed mode changes.
0
0
2
0
1
0
0
RESET
MM912F634
0
0
0
181