MM912H634DM1AER2 Freescale Semiconductor, MM912H634DM1AER2 Datasheet - Page 202

• Manufacturer Part Number: MM912H634DM1AER2
• Description: 16-bit Microcontrollers - MCU 64KS12 LIN2XLS/HS ISENSE
• Manufacturer: Freescale Semiconductor

Specifications of MM912H634DM1AER2

• Rohs: yes
• Core: HCS12
• Processor Series: MM912F634
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 5.5 V to 18 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 15
• Interface Type: SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 15
• Number Of Timers: 1
• Program Memory Type: Flash
• Supply Voltage - Max: 18 V
• Supply Voltage - Min: 5.5 V

Functional Description and Application Information
4.30.4.3
Hardware commands are used to read and write target system memory locations and to enter active background debug mode.
Target system memory includes all memory that is accessible by the CPU such as on-chip RAM, Flash, I/O and control registers.
Hardware commands are executed with minimal or no CPU intervention and do not require the system to be in active BDM for
execution, although, they can still be executed in this mode. When executing a hardware command, the BDM sub-block waits for
a free bus cycle so that the background access does not disturb the running application program. If a free cycle is not found within
128 clock cycles, the CPU is momentarily frozen so that the BDM can steal a cycle. When the BDM finds a free cycle, the
operation does not intrude on normal CPU operation provided that it can be completed in a single cycle. However, if an operation
requires multiple cycles the CPU is frozen until the operation is complete, even though the BDM found a free cycle.
The BDM hardware commands are listed in
The READ_BD and WRITE_BD commands allow access to the BDM register locations. These locations are not normally in the
system memory map but share addresses with the application in memory. To distinguish between physical memory locations that
share the same address, BDM memory resources are enabled just for the READ_BD and WRITE_BD access cycle. This allows
the BDM to access BDM locations unobtrusively, even if the addresses conflict with the application memory map.
If ACK pulse is enabled, an ACK pulse will occur when data is ready for transmission for all BDM READ commands and will occur
after the write is complete for all BDM WRITE commands
Table 256. Hardware Commands
Freescale Semiconductor
BACKGROUND
ACK_ENABLE
ACK_DISABLE
READ_BD_BYTE
READ_BD_WORD
READ_BYTE
READ_WORD
WRITE_BD_BYTE
WRITE_BD_WORD
WRITE_BYTE
WRITE_WORD
Command
BDM Hardware Commands
Opcode
(hex)
EC
CC
D5
D6
E4
E0
E8
C4
C0
C8
90
16-bit data out
16-bit data out
16-bit data out
16-bit data out
16-bit address
16-bit address
16-bit address
16-bit address
16-bit address
16-bit address
16-bit address
16-bit address
16-bit data in
16-bit data in
16-bit data in
16-bit data in
None
None
None
Data
Table
Enter background mode if firmware is enabled. If enabled, an ACK will be issued when
the part enters active background mode.
Enable Handshake. Issues an ACK pulse after the command is executed.
Disable Handshake. This command does not issue an ACK pulse.
Read from memory with standard BDM firmware lookup table in map.
Odd address data on low byte; even address data on high byte.
Read from memory with standard BDM firmware lookup table in map.
Must be aligned access.
Read from memory with standard BDM firmware lookup table out of map.
Odd address data on low byte; even address data on high byte.
Read from memory with standard BDM firmware lookup table out of map. Must be
aligned access.
Write to memory with standard BDM firmware lookup table in map.
Odd address data on low byte; even address data on high byte.
Write to memory with standard BDM firmware lookup table in map.
Must be aligned access.
Write to memory with standard BDM firmware lookup table out of map.
Odd address data on low byte; even address data on high byte.
Write to memory with standard BDM firmware lookup table out of map.
Must be aligned access.
256.
Background Debug Module (S12SBDMV1)
Description
MM912F634
202