MPC8533EVTAQGA Freescale Semiconductor, MPC8533EVTAQGA Datasheet - Page 104

• Manufacturer Part Number: MPC8533EVTAQGA
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTAQGA

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.0GHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 783-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Overview
1-6
•
Two enhanced three-speed Ethernet controllers (eTSECs)
— Backward compatible with MPC8540/MPC8560 (PowerQUICC III) TSEC
— Three-speed support (10/100/1000 Mbps)
— Two IEEE 802.3, 802.3u, 802.3x, 802.3z, 802.3ac, 802.3ab compliant controllers
— Support for two full-duplex FIFO interface modes
— Support for various Ethernet physical interfaces:
— Flexible configuration for multiple PHY interface configurations. See
— TCP/IP acceleration and QoS features available
— Quality of service support:
— Full- and half-duplex Ethernet support (1000 Mbps supports only full duplex):
— Programmable maximum frame length supports jumbo frames (up to 9.6 Kbytes) and IEEE
— VLAN insertion and deletion
— Retransmission following a collision
— CRC generation and verification of inbound/outbound frames
— Programmable Ethernet preamble insertion and extraction of up to 7 bytes
— MAC address recognition:
– 1000 Mbps full-duplex IEEE 802.3 GMII, IEEE 802.3z TBI, RTBI, and RGMII
– 10/100 Mbps full and half-duplex IEEE 802.3 MII, IEEE 802.3 RGMII, and RMI
“Enhanced Three-Speed Ethernet Controllers (eTSECs),”
– IP v4 and IP v6 header recognition on receive
– IP v4 header checksum verification and generation
– TCP and UDP checksum verification and generation
– Per-packet configurable acceleration
– Recognition of VLAN, stacked (queue in queue) VLAN, IEEE 802.2 Std.™, PPPoE
– Supported in all FIFO modes
– Transmission from up to eight physical queues
– Reception to up to eight physical queues
– IEEE 802.3 Std.™ full-duplex flow control (automatic PAUSE frame generation or
802.1 Std.™ virtual local area network (VLAN) tags and priority
– Per-frame VLAN control word or default VLAN for each eTSEC
– Extracted VLAN control word passed to software separately
– Exact match on primary and virtual 48-bit unicast addresses
– VRRP and HSRP support for seamless router fail-over
– Up to 16 exact-match MAC addresses supported
– Broadcast address (accept/reject)
– Hash table match on up to 512 multicast addresses
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
session, MPLS stacks, and ESP/AH IP-security headers
software-programmed PAUSE frame generation and recognition)
for more information.
Section 1.3.13,
Freescale Semiconductor