MPC8533EVTAQGA Freescale Semiconductor, MPC8533EVTAQGA Datasheet - Page 577

• Manufacturer Part Number: MPC8533EVTAQGA
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTAQGA

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.0GHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 783-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Table 12-56
Freescale Semiconductor
Value
51
52
53
54
55
56
57
58
59
Table 12-55. Crypto-Channel Pointer Status Register Error Field Descriptions (continued)
shows the possible values of the PTR_DW field in the CPSR.
Scatter/gather data length zero error. A zero length scatter/gather data pointer was detected.
Fetch pointer zero error. An all zero fetch pointer was detected.
Illegal descriptor header. Possible causes of an illegal descriptor header are:
Invalid EU assignment request. Indicates the channel was assigned one or more EUs not requested by the
descriptor header.
EU error detected. An EU assigned to this channel has generated an error interrupt. This error may also be
reflected in the controller's interrupt status register.
Gather boundary error. Indicates a gather pointer straddles both a primary and secondary EU’s data transfer.
Gather return/length error. Indicates the total data size covered by a gather link table did not match the total
data size from the main descriptor.
Scatter boundary error. Indicates a scatter pointer straddles both a primary and secondary EU’s data transfer.
Scatter return/length error. Indicates the total data size covered by a scatter link table did not match the total
data size from the main descriptor.
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
• Invalid primary EU indicated by op0 field in descriptor header.
• Invalid secondary EU indicated by op1 field in descriptor header.
• Descriptor type field in descriptor headers indicates secondary EU transaction when not in snoop mode
0x08–FF Reserved
The EU error bit (bit 55) can only be cleared by first clearing the error
source in the assigned EU which caused it to be set.
Value
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
Table 12-56. Channel Pointer Status Register PTR_DW Field Values
Processing header or pointer dword 0
Processing pointer dword 1
Processing pointer dword 2
Processing pointer dword 3
Processing pointer dword 4
Processing pointer dword 5
Processing pointer dword 6
Complete (or not yet begun) processing of header dword and pointer dwords
NOTE
Error
Error
Security Engine (SEC) 2.1
12-99