MPC8533EVTAQGA Freescale Semiconductor, MPC8533EVTAQGA Datasheet - Page 1170

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MPC8533EVTAQGA

Manufacturer Part Number
MPC8533EVTAQGA
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8533EVTAQGA

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.0GHz
Voltage
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Package / Case
783-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8533EVTAQGA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Global Utilities
19.4.1.5
PORDBGMSR, shown in
described in
Configuration.”
Table 19-8
19.4.1.6
Figure 19-6
19-10
7–31
Bits
0–4
Offset 0xE_0014
Reset n 0 0 0 n n n n 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
5
6
Offset 0xE_0010
Reset 0 0 0 0
W
R
W
R
MEM_SEL Memory select. Indicates which controller is driving MSRCID[0:4] and MDVAL.
DDR_DBG DDR debug configuration
0
0
Name
describes the bit settings of PORDBGMSR.
describes the bit settings of PORDEVSR2.
Section 4.4.3.18, “Memory Debug Configuration,”
POR Debug Mode Status Register (PORDBGMSR)
POR Device Status Register 2 (PORDEVSR2)
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Reserved
0 Local bus controller is driving debug information
1 DDR SDRAM controller is driving debug information
0 SourceID and data valid information is being driven on ECC pins of DDR SDRAM interface
1 Normal mode. ECC information is being driven on ECC pins of DDR SDRAM interface
Reserved
Figure 19-5. POR Debug Mode Status Register (PORDBGMSR)
0
4
Figure 19-6. POR Device Status Register 2 (PORDEVSR2)
Figure
Table 19-8. PORDBGMSR Field Descriptions
MEM_SEL
19-5, holds debug mode settings from the POR configuration pins as
n
5
DDR_DBG
6
n
Description
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
7
and
Section 4.4.3.19, “DDR Debug
25
SEC_CFG
Freescale Semiconductor
26
n
Access: Read Only
Access: Read Only
27
1 1 1 n n
31
31

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