MPC8533EVTAQGA Freescale Semiconductor, MPC8533EVTAQGA Datasheet - Page 550

• Manufacturer Part Number: MPC8533EVTAQGA
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTAQGA

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.0GHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 783-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Security Engine (SEC) 2.1
12.4.6.6
The AESU interrupt status register tracks the state of possible errors, if those errors are not masked via the
AESU interrupt control register. The definition of each bit in the interrupt status register is shown in
Figure
Table 12-42
12-72
Address AESU 0x3_4030
0–48
Bits Name
49
50
51
52
53
54
55
56
57
Reset
W
R
ERE
KSE
DSE
12-52.
ICE
ME
AE
CE
—
—
IE
0
describes the AESU interrupt status register fields.
Reserved
Integrity check error
0 No error detected
1 Integrity check error detected. An ICV check was performed and the supplied ICV did not match the one
Reserved
Internal error. An internal processing error was detected while the AESU was processing.
0 No error detected
1 Internal error
Note: This bit will be asserted any time an enabled error condition occurs and can only be cleared by setting the
Early read error. The AESU IV register was read while the AESU was processing.
0 No error detected
1 Early read error
Context error. An AESU key register, the key size register, data size register, mode register, or IV register was
modified while AESU was processing
0 No error detected
1 Context error
Key size error. An inappropriate value (not 16, 24 or 32bytes) was written to the AESU key size register
0 No error detected
1 Key size error
Data size error (DSE): A value was written to the AESU data size register that is not a proper size. See
Section 12.4.6.3, “AESU Data Size Register (AESUDSR).”
0 No error detected
1 Data size error
Mode error. Indicates that invalid data was written to a register or a reserved mode bit was set.
0 Valid data
1 Reserved or invalid mode selected
Address error. An illegal read or write address was detected within the AESU address space.
0 No error detected
1 Address error
AESU Interrupt Status Register (AESUISR)
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
computed by the AESU.
corresponding bit in the interrupt control Register or by resetting the AESU.
—
Table 12-42. AESU Interrupt Status Register Field Descriptions
48
Figure 12-52. AESU Interrupt Status Register
ICE
49
—
50
51
IE
ERE CE KSE DSE ME
52
All zeros
Description
53
54
55
56
AE OFE IFE
57
58
59
Freescale Semiconductor
—
60
Access: Read-only
IFO OFU —
61
62
63